{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,8]],"date-time":"2026-01-08T01:31:59Z","timestamp":1767835919029,"version":"3.49.0"},"reference-count":26,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/cgo.2004.1281661","type":"proceedings-article","created":{"date-parts":[[2004,6,10]],"date-time":"2004-06-10T10:19:45Z","timestamp":1086862785000},"page":"27-38","source":"Crossref","is-referenced-by-count":4,"title":["Physical experimentation with prefetching helper threads on Intel's hyper-threaded processors"],"prefix":"10.1109","author":[{"family":"Dongkeun Kim","sequence":"first","affiliation":[]},{"given":"S.S.","family":"Liao","sequence":"additional","affiliation":[]},{"given":"P.H.","family":"Wang","sequence":"additional","affiliation":[]},{"given":"J.","family":"del Cuvillo","sequence":"additional","affiliation":[]},{"family":"Xinmin Tian","sequence":"additional","affiliation":[]},{"family":"Xiang Zou","sequence":"additional","affiliation":[]},{"family":"Hong Wang","sequence":"additional","affiliation":[]},{"given":"D.","family":"Yeung","sequence":"additional","affiliation":[]},{"given":"M.","family":"Girkar","sequence":"additional","affiliation":[]},{"given":"J.P.","family":"Shen","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"crossref","first-page":"159","DOI":"10.1145\/605397.605415","author":"kim","year":"2002","journal-title":"Proceedings of the 10th International Conference on Architectural Support for Programming Languages and Operating Systems"},{"key":"ref11","first-page":"117","author":"liao","year":"2002","journal-title":"Proc ACM SIGPLAN '02 Conf Programming Language Design and Implementation"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/379240.379250"},{"key":"ref13","article-title":"Hyper-Threading Technology Architecture and Microarchitecture","author":"marr","year":"2002","journal-title":"Intel Technology Journal Volume 6 Issue on Hyper-Threading Technology"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/377792.377856"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/273011.273021"},{"key":"ref16","first-page":"191","author":"roth","year":"2001","journal-title":"Proceedings of the 7th International Conference on High Performance Computer Architecture"},{"key":"ref17","article-title":"Tracing with Pixie","author":"smith","year":"1991","journal-title":"Technical Report CSL-TR-91-497"},{"key":"ref18","first-page":"171","author":"solihin","year":"2002","journal-title":"Proceedings of the 29th annual international symposium on Computer architecture"},{"key":"ref19","article-title":"Assisted Execution","author":"song","year":"1998","journal-title":"Technical Report CENG 98-25"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/12.381947"},{"key":"ref3","doi-asserted-by":"crossref","first-page":"186","DOI":"10.1145\/307338.300995","author":"chappell","year":"1999","journal-title":"Proceedings of the 26th Annual International Symposium on Computer Architecture"},{"key":"ref6","doi-asserted-by":"crossref","first-page":"306","DOI":"10.1109\/MICRO.2001.991128","author":"collins","year":"2001","journal-title":"Proceedings of the 34th Annual ACM\/IEEE International Symposium on Microarchitecture"},{"key":"ref5","first-page":"1","author":"chilimbi","year":"1999","journal-title":"Proceedings of the ACM SIGPLAN '99 Conference on Programming Language Design and Implementation"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/2.869367"},{"key":"ref7","first-page":"14","author":"collins","year":"2001","journal-title":"Proceedings of the 28th Annual International Symposium on Computer Architecture"},{"key":"ref2","article-title":"Olden: Parallelizing Programs with Dynamic Data Structures on Distributed-Memory Machines","author":"carlisle","year":"1996"},{"key":"ref9","article-title":"The Microarchitecture of the Pentium 4 Processor","author":"hinton","year":"2001","journal-title":"Intel Technology Journal Issue on Pentium 4 Processor"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/379240.379251"},{"key":"ref20","first-page":"191","author":"sundaramoorthy","year":"2000","journal-title":"Proceedings of the 9th International Conference on Architectural Support for Programming Languages and Operating Systems"},{"key":"ref22","doi-asserted-by":"crossref","first-page":"54","DOI":"10.1109\/HPCA.1999.744326","author":"tullsen","year":"1999","journal-title":"Proceedings of the 5th International Symposium on High-Performance Computer Architecture"},{"key":"ref21","first-page":"392","author":"tullsen","year":"1995","journal-title":"Proceedings of the 22nd Annual International Symposium on Computer Architecture"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TSE.1984.5010248"},{"key":"ref23","year":"0","journal-title":"VTune performance analyzer"},{"key":"ref26","doi-asserted-by":"crossref","first-page":"172","DOI":"10.1145\/342001.339676","author":"zilles","year":"2000","journal-title":"Proceedings of the 27th annual international symposium on Computer architecture"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2001.937426"}],"event":{"name":"International Symposium on Code Generation and Optimization, 2004. CGO 2004.","location":"San Jose, CA, USA"},"container-title":["International Symposium on Code Generation and Optimization, 2004. CGO 2004."],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/9012\/28612\/01281661.pdf?arnumber=1281661","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,4,2]],"date-time":"2020-04-02T07:29:55Z","timestamp":1585812595000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1281661\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":26,"URL":"https:\/\/doi.org\/10.1109\/cgo.2004.1281661","relation":{},"subject":[]}}