{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,29]],"date-time":"2025-09-29T11:45:57Z","timestamp":1759146357006,"version":"3.38.0"},"reference-count":38,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2011,4]]},"DOI":"10.1109\/cgo.2011.5764672","type":"proceedings-article","created":{"date-parts":[[2011,5,9]],"date-time":"2011-05-09T20:40:43Z","timestamp":1304973643000},"page":"32-41","source":"Crossref","is-referenced-by-count":5,"title":["Link-time optimization for power efficiency in a tagless instruction cache"],"prefix":"10.1109","author":[{"given":"Timothy M.","family":"Jones","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sandro","family":"Bartolini","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jonas","family":"Maebe","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Dominique","family":"Chanet","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1145\/1210268.1210271"},{"key":"ref33","doi-asserted-by":"crossref","DOI":"10.3233\/EMC-2005-00048","article-title":"Improving power efficiency with compiler-assisted cache replacement","volume":"1","author":"yang","year":"2005","journal-title":"Journal of Embedded Computing"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1145\/1013235.1013270"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1145\/859626.859629"},{"key":"ref30","article-title":"Using the compiler to improve cache replacement decisions","author":"wang","year":"2002","journal-title":"2011 International Conference on Parallel Architectures and Compilation Techniques PACT"},{"key":"ref37","article-title":"A compiler-controlled instruction cache architecture for an embedded low power microprocessor","author":"zhu","year":"2005","journal-title":"ternational Conference Computer and Information Technology"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1145\/782814.782828"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2002.1176251"},{"key":"ref34","article-title":"Energy efficient frequent value data cache design","author":"yang","year":"2002","journal-title":"MICRO International Symposium on Microarchitecture"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/1331331.1331335"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2002.1003572"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/40.476254"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2007.28"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2005.81"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2001.937453"},{"key":"ref16","article-title":"Drowsy instruction caches: Leakage power reduction using dynamic voltage scaling and cache sub-bank prediction","author":"kim","year":"2002","journal-title":"MICRO International Symposium on Microarchitecture"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.1997.645809"},{"key":"ref18","article-title":"Thermal management of on-chip caches through power density minimization","author":"ku","year":"2005","journal-title":"MICRO International Symposium on Microarchitecture"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1145\/313817.313944"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2006.82"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1145\/1016720.1016748"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/92.845897"},{"year":"0","key":"ref27"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/DSD.2003.1231984"},{"key":"ref5","doi-asserted-by":"crossref","first-page":"287","DOI":"10.1145\/223982.224439","article-title":"Next cache line and set prediction","author":"calder","year":"1995","journal-title":"Proceedings 22nd Annual International Symposium on Computer Architecture ISCA"},{"key":"ref29","doi-asserted-by":"crossref","DOI":"10.1109\/MICRO.2000.898072","article-title":"Dynamic zero compression for cache energy reduction","author":"villa","year":"2000","journal-title":"MICRO International Symposium on Microarchitecture"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/1086642.1086645"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2008.224"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.1999.809463"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2008.4771813"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/1183401.1183436"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/1669112.1669172"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1145\/1086297.1086313"},{"key":"ref21","article-title":"Way memoization to reduce fetch energy in instruction caches","author":"ma","year":"2001","journal-title":"WCED — Workshop on Complexity-Effective Design (ISCA)"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/CGO.2005.13"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2001.991105"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1145\/1086297.1086310"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/INTERACT.2005.7"}],"event":{"name":"2011 9th Annual IEEE\/ACM International Symposium on Code Generation and Optimization (CGO)","start":{"date-parts":[[2011,4,2]]},"location":"Chamonix, France","end":{"date-parts":[[2011,4,6]]}},"container-title":["International Symposium on Code Generation and Optimization (CGO 2011)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5755493\/5764641\/05764672.pdf?arnumber=5764672","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,3,5]],"date-time":"2025-03-05T13:11:59Z","timestamp":1741180319000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5764672\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,4]]},"references-count":38,"URL":"https:\/\/doi.org\/10.1109\/cgo.2011.5764672","relation":{},"subject":[],"published":{"date-parts":[[2011,4]]}}}