{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,2]],"date-time":"2026-07-02T23:44:58Z","timestamp":1783035898198,"version":"3.54.6"},"reference-count":45,"publisher":"IEEE","license":[{"start":{"date-parts":[[2022,4,2]],"date-time":"2022-04-02T00:00:00Z","timestamp":1648857600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2022,4,2]],"date-time":"2022-04-02T00:00:00Z","timestamp":1648857600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100007688","name":"American University of Beirut","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100007688","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2022,4,2]]},"DOI":"10.1109\/cgo53902.2022.9741284","type":"proceedings-article","created":{"date-parts":[[2022,3,29]],"date-time":"2022-03-29T19:51:20Z","timestamp":1648583480000},"page":"1-13","source":"Crossref","is-referenced-by-count":8,"title":["A Compiler Framework for Optimizing Dynamic Parallelism on GPUs"],"prefix":"10.1109","author":[{"given":"Mhd Ghaith","family":"Olabi","sequence":"first","affiliation":[{"name":"American University of Beirut,Lebanon"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Juan Gomez","family":"Luna","sequence":"additional","affiliation":[{"name":"ETH Z&#x00FC;rich,Switzerland"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Onur","family":"Mutlu","sequence":"additional","affiliation":[{"name":"ETH Z&#x00FC;rich,Switzerland"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Wen-Mei","family":"Hwu","sequence":"additional","affiliation":[{"name":"NVIDIA,USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Izzat El","family":"Hajj","sequence":"additional","affiliation":[{"name":"American University of Beirut,Lebanon"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1145\/3007787.3001199"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1145\/2749469.2750393"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-89740-8_2"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1145\/3194242"},{"key":"ref31","doi-asserted-by":"crossref","DOI":"10.1609\/aaai.v29i1.9277","article-title":"The network data repository with interactive graph analytics and visualization","author":"rossi","year":"2015","journal-title":"AAAI"},{"key":"ref30","article-title":"CUDA programming guide v. 11.2","year":"2021"},{"key":"ref37","article-title":"Acceleration and optimization of dynamic parallelism for irregular applications on GPUs","author":"wang","year":"2016"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1145\/2668930.2688046"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1145\/3287318"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2017.14"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/1735688.1735702"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/IISWC.2014.6983039"},{"key":"ref11","article-title":"9th DIMACS implementation challenge - shortest paths","year":"2006"},{"key":"ref12","article-title":"Dynamic loop vectorization for executing OpenCL kernels on CPUs","author":"el hajj","year":"2014"},{"key":"ref13","article-title":"Techniques for optimizing dynamic parallelism on graphics processing units","author":"el hajj","year":"2018"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2016.7783716"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ICDE51399.2021.00092"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/MASCOTS.2016.58"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/PACT.2019.00033"},{"key":"ref18","first-page":"1","article-title":"Improving performance of OpenCL on CPUs","author":"karrenberg","year":"2012","journal-title":"International Conference on Compiler Construction"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2016.36"},{"key":"ref28","article-title":"NVIDIA Tesla V100 GPU architecture: The world&#x2019;s most advanced data center GPU. version WP-08608-001 v1","year":"0"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/2628071.2628092"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/HPEC.2018.8547517"},{"key":"ref3","article-title":"AMD EPYC 7551P","year":"0"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/3178487.3178492"},{"key":"ref29","article-title":"CUDA samples v. 7.5","year":"2015"},{"key":"ref5","article-title":"Proceedings of SAT Competition 2014","author":"belov","year":"2014"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/IISWC.2012.6402918"},{"key":"ref7","first-page":"595","article-title":"The WebGraph framework I: Compression techniques","author":"boldi","year":"2004","journal-title":"Proc of the Thirteenth International World Wide Web Conference (WWW 2004)"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA52012.2021.00034"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/2830772.2830818"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/3123939.3123976"},{"key":"ref20","first-page":"257","article-title":"Localitycentric thread scheduling for bulk-synchronous programming models on CPU architectures","author":"kim","year":"2015","journal-title":"Proceedings of the Annual IEEE\/ACM International Symposium on Code Generation and Optimization"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1145\/3123939.3123978"},{"key":"ref22","author":"kirk","year":"2016","journal-title":"Programming Massively Parallel Processors A Hands-on Approach"},{"key":"ref21","article-title":"Multi-tier dynamic vectorization for translating GPU optimizations into CPU performance","author":"kim","year":"2014","journal-title":"Center for Reliable and High-Performance Computing"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1145\/2555243.2555254"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1145\/2723772.2723780"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2016.98"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/CGO.2004.1281665"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1145\/3203217.3203243"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1145\/2628071.2628087"},{"key":"ref43","article-title":"Transforming and optimizing irregular applications for parallel architectures","author":"zhang","year":"2018"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/ICPP.2015.107"}],"event":{"name":"2022 IEEE\/ACM International Symposium on Code Generation and Optimization (CGO)","location":"Seoul, Korea, Republic of","start":{"date-parts":[[2022,4,2]]},"end":{"date-parts":[[2022,4,6]]}},"container-title":["2022 IEEE\/ACM International Symposium on Code Generation and Optimization (CGO)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9741235\/9741095\/09741284.pdf?arnumber=9741284","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,1,30]],"date-time":"2023-01-30T20:23:47Z","timestamp":1675110227000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9741284\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,4,2]]},"references-count":45,"URL":"https:\/\/doi.org\/10.1109\/cgo53902.2022.9741284","relation":{},"subject":[],"published":{"date-parts":[[2022,4,2]]}}}