{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,4,20]],"date-time":"2025-04-20T04:01:19Z","timestamp":1745121679474},"reference-count":18,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/cicc.2004.1358930","type":"proceedings-article","created":{"date-parts":[[2004,11,30]],"date-time":"2004-11-30T19:56:05Z","timestamp":1101844565000},"page":"719-722","source":"Crossref","is-referenced-by-count":15,"title":["A novel low-power FPGA routing switch"],"prefix":"10.1109","author":[{"given":"J.H.","family":"Anderson","sequence":"first","affiliation":[]},{"given":"F.N.","family":"Najm","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","article-title":"High-performance and low-power challenges for sub-70nm microprocessor circuits","author":"krishnamurthy","year":"2002","journal-title":"IEEE CICC"},{"journal-title":"Design of interconnection networks for programmable logic devices","year":"2003","author":"lemieux","key":"ref11"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/968280.968288"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/871506.871535"},{"journal-title":"Spartan-3 FPGA Data Sheet","year":"2003","key":"ref14"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/43.986424"},{"year":"0","key":"ref16"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2004.1283728"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/871506.871511"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2003.1249359"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/503048.503072"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/968280.968285"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/611843.611844"},{"key":"ref8","article-title":"Dynamic and leakage power reduction in MTCMOS circuits using an automated efficient gate clustering technique","author":"anis","year":"2002","journal-title":"ACM\/IEEE DAC"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2002.808156"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4615-1421-3"},{"journal-title":"International Technology Roadmap for Semiconductors (ITRS)","year":"2002","key":"ref1"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.1998.687998"}],"event":{"name":"Proceedings of the IEEE 2004 Custom Integrated Circuits Conference","acronym":"CICC-04","location":"Orlando, FL, USA"},"container-title":["Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/9389\/29800\/01358930.pdf?arnumber=1358930","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,14]],"date-time":"2017-03-14T02:40:08Z","timestamp":1489459208000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1358930\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":18,"URL":"https:\/\/doi.org\/10.1109\/cicc.2004.1358930","relation":{},"subject":[]}}