{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T09:08:33Z","timestamp":1725440913324},"reference-count":9,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2009,9]]},"DOI":"10.1109\/cicc.2009.5280794","type":"proceedings-article","created":{"date-parts":[[2009,10,12]],"date-time":"2009-10-12T19:41:30Z","timestamp":1255376490000},"page":"503-506","source":"Crossref","is-referenced-by-count":0,"title":["REad\/access-preferred (REAP) SRAM - architecture-aware bit cell design for improved yield and lower V<inf>MIN<\/inf>"],"prefix":"10.1109","author":[{"given":"Ashish","family":"Goel","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Patrick","family":"Ndai","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jaydeep. P.","family":"Kulkarni","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Kaushik","family":"Roy","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"journal-title":"Benchmarks","year":"2000","key":"3"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2003.1196114"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1145\/775832.775920"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1997.639732"},{"journal-title":"Predictive Technology Model (PTM)","year":"0","key":"6"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.897161"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2005.852295"},{"key":"9","article-title":"A Scalable, Circuit-Architecture Co-Design to Improve Memory Yield for High Performance Microprocessors","author":"ndai","year":"2009","journal-title":"TVLSI"},{"journal-title":"The Simplescalar Toolset 3 0","year":"0","key":"8"}],"event":{"name":"2009 IEEE Custom Integrated Circuits Conference (CICC)","start":{"date-parts":[[2009,9,13]]},"location":"San Jose, CA, USA","end":{"date-parts":[[2009,9,16]]}},"container-title":["2009 IEEE Custom Integrated Circuits Conference"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5268172\/5280726\/05280794.pdf?arnumber=5280794","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,19]],"date-time":"2017-03-19T03:25:24Z","timestamp":1489893924000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5280794\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2009,9]]},"references-count":9,"URL":"https:\/\/doi.org\/10.1109\/cicc.2009.5280794","relation":{},"subject":[],"published":{"date-parts":[[2009,9]]}}}