{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,13]],"date-time":"2026-03-13T12:55:18Z","timestamp":1773406518309,"version":"3.50.1"},"reference-count":3,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,9]]},"DOI":"10.1109\/cicc.2010.5617473","type":"proceedings-article","created":{"date-parts":[[2010,11,10]],"date-time":"2010-11-10T15:53:49Z","timestamp":1289404429000},"page":"1-4","source":"Crossref","is-referenced-by-count":2,"title":["Interpolated VCO design for a low bandwidth, low-jitter, self-biased PLL in 45 nm CMOS"],"prefix":"10.1109","author":[{"given":"D.","family":"Duarte","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"S.","family":"Hsu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"K.","family":"Wong","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"M.","family":"Huang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"G.","family":"Taylor","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref3","doi-asserted-by":"crossref","first-page":"424","DOI":"10.1109\/ISSCC.2003.1234367","article-title":"Self-biased, high-bandwidth, low-jitter 1-to-4096 multiplier clock-generator PLL","author":"maneatis","year":"2003","journal-title":"Digest of Technical Papers IEEE International Solid-State Circuits Conference"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2003.1234366"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1996.542317"}],"event":{"name":"2010 IEEE Custom Integrated Circuits Conference -CICC 2010","location":"San Jose, CA, USA","start":{"date-parts":[[2010,9,19]]},"end":{"date-parts":[[2010,9,22]]}},"container-title":["IEEE Custom Integrated Circuits Conference 2010"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5605059\/5617377\/05617473.pdf?arnumber=5617473","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,19]],"date-time":"2017-06-19T12:00:37Z","timestamp":1497873637000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5617473\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,9]]},"references-count":3,"URL":"https:\/\/doi.org\/10.1109\/cicc.2010.5617473","relation":{},"subject":[],"published":{"date-parts":[[2010,9]]}}}