{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,4,18]],"date-time":"2025-04-18T05:25:51Z","timestamp":1744953951259},"reference-count":10,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2012,9]]},"DOI":"10.1109\/cicc.2012.6330673","type":"proceedings-article","created":{"date-parts":[[2012,10,19]],"date-time":"2012-10-19T00:50:31Z","timestamp":1350607831000},"page":"1-4","source":"Crossref","is-referenced-by-count":5,"title":["Staggered Core Activation: A circuit\/architectural approach for mitigating resonant supply noise issues in multi-core multi-power domain processors"],"prefix":"10.1109","author":[{"given":"Ayan","family":"Paul","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Matt","family":"Amrein","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Saket","family":"Gupta","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Arvind","family":"Vinod","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Abhishek","family":"Arun","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sachin","family":"Sapatnekar","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Chris H.","family":"Kim","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2007.4342684"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2006.1696285"},{"journal-title":"SPEC 2000","year":"0","key":"10"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2007.78"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.870925"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2000.839850"},{"key":"5","first-page":"286","article-title":"On-Die Supply-Resonance Suppression Using Band-Limited Active Damping","author":"xu","year":"2007","journal-title":"Proc Int Solid-State Circuits Conf"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2020454"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/L-CA.2002.8"},{"key":"8","first-page":"83","article-title":"Wattch: a framework for architectural-level power analysis and optimizations","author":"brooks","year":"2000","journal-title":"Proceedings of 27th International Symposium on Computer Architecture (IEEE Cat No RS00201) ISCA"}],"event":{"name":"2012 IEEE Custom Integrated Circuits Conference - CICC 2012","start":{"date-parts":[[2012,9,9]]},"location":"San Jose, CA, USA","end":{"date-parts":[[2012,9,12]]}},"container-title":["Proceedings of the IEEE 2012 Custom Integrated Circuits Conference"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/6320859\/6330557\/06330673.pdf?arnumber=6330673","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,21]],"date-time":"2017-03-21T22:07:55Z","timestamp":1490134075000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6330673\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,9]]},"references-count":10,"URL":"https:\/\/doi.org\/10.1109\/cicc.2012.6330673","relation":{},"subject":[],"published":{"date-parts":[[2012,9]]}}}