{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,22]],"date-time":"2024-10-22T21:25:45Z","timestamp":1729632345589,"version":"3.28.0"},"reference-count":10,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2012,9]]},"DOI":"10.1109\/cicc.2012.6330685","type":"proceedings-article","created":{"date-parts":[[2012,10,18]],"date-time":"2012-10-18T20:50:31Z","timestamp":1350593431000},"page":"1-4","source":"Crossref","is-referenced-by-count":2,"title":["Lithography and design integration &amp;#x2014; New paradigm for the technology architecture development"],"prefix":"10.1109","author":[{"given":"Jongwook","family":"Kye","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yuansheng","family":"Ma","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Lei","family":"Yuan","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yunfei","family":"Deng","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Harry","family":"Levinson","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"journal-title":"SEMICON West TechXPOT Advanced Lithography Presentation","year":"2010","author":"kye","key":"3"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1117\/12.883462"},{"key":"10","first-page":"797322","article-title":"Spacer-defined double patterning for 20\/15-nm logic BEOL technology","volume":"7973","author":"kim","year":"2011","journal-title":"Proc SPIE"},{"key":"1","doi-asserted-by":"crossref","first-page":"764105","DOI":"10.1117\/12.847222","article-title":"Taming the final frontier of optical lithography: Design for sub-resolution patterning","volume":"7641","author":"liebmann","year":"2010","journal-title":"Proc of SPIE"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1117\/12.879846"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1117\/12.915713"},{"key":"5","doi-asserted-by":"crossref","DOI":"10.1117\/12.879643","article-title":"Decomposition-aware DRC to enable double-patterning compliant standard cell libraries","volume":"7974","author":"liebmann","year":"2011","journal-title":"Proc SPIE"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1117\/12.879793"},{"key":"9","doi-asserted-by":"crossref","DOI":"10.1117\/12.848387","article-title":"Decomposition Strategies for Self-Aligned Double Patterning","volume":"7641","author":"ma","year":"2010","journal-title":"Proc SPIE"},{"key":"8","doi-asserted-by":"crossref","first-page":"832706","DOI":"10.1117\/12.917775","article-title":"Self-aligned double patterning (SADP) compliant design flow","volume":"8327","author":"ma","year":"2012","journal-title":"Proc SPIE"}],"event":{"name":"2012 IEEE Custom Integrated Circuits Conference - CICC 2012","start":{"date-parts":[[2012,9,9]]},"location":"San Jose, CA, USA","end":{"date-parts":[[2012,9,12]]}},"container-title":["Proceedings of the IEEE 2012 Custom Integrated Circuits Conference"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/6320859\/6330557\/06330685.pdf?arnumber=6330685","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,20]],"date-time":"2017-06-20T21:36:31Z","timestamp":1497994591000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6330685\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,9]]},"references-count":10,"URL":"https:\/\/doi.org\/10.1109\/cicc.2012.6330685","relation":{},"subject":[],"published":{"date-parts":[[2012,9]]}}}