{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,10]],"date-time":"2026-05-10T02:55:46Z","timestamp":1778381746574,"version":"3.51.4"},"reference-count":21,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014,9]]},"DOI":"10.1109\/cicc.2014.6946042","type":"proceedings-article","created":{"date-parts":[[2014,11,12]],"date-time":"2014-11-12T22:50:10Z","timestamp":1415832610000},"page":"1-9","source":"Crossref","is-referenced-by-count":8,"title":["POWER8 design methodology innovations for improving productivity and reducing power"],"prefix":"10.1109","author":[{"given":"Matthew M.","family":"Ziegler","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ruchir","family":"Puri","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Bob","family":"Philhower","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Robert","family":"Franch","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Wing","family":"Luk","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jens","family":"Leenstra","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Peter","family":"Verwegen","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Niels","family":"Fricke","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"George","family":"Gristede","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Eric","family":"Fluhr","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Victor","family":"Zyuban","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/2451916.2451954"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/2451916.2451954"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2013.6691141"},{"key":"ref13","author":"cho","year":"2013","journal-title":"Structured Latch and Local-Clock-Buffer Planning"},{"key":"ref14","article-title":"Soft hierarchy-based physical synthesis for large-scale, high-performance circuits","author":"cho","year":"2013"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2007.4342761"},{"key":"ref16","article-title":"Superblock: A Method for Synthesizing Large High Performance Designs without Hierarchy Limits","author":"varada","year":"2010","journal-title":"Design Automation Conference (DAC)"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1147\/JRD.2013.2279597"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/1594233.1594265"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/ISLPED.2013.6629335"},{"key":"ref4","article-title":"POWER7+&#x2122;: IBM's next generation POWER microprocessor","author":"taylor","year":"2012","journal-title":"Hot Chips 24"},{"key":"ref3","doi-asserted-by":"crossref","DOI":"10.1109\/IEDM.2012.6478971","article-title":"22nm High-Performance SOl Technology Featuring Dual-Embedded Stressors, Epi-Plate High-K Deep-Trench Embedded DRAM and Self-Aligned Via 15LM BEOL","author":"narasimha","year":"2012","journal-title":"IEEE International Electron Devices Meetinz (lEDM)&#x2018;"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.2000.855392"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.910963"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1147\/JRD.2011.2105692"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/988952.989060"},{"key":"ref2","article-title":"Converged large block and structured synthesis for high performance microprocessor designs","author":"cho","year":"2012"},{"key":"ref1","doi-asserted-by":"crossref","DOI":"10.1109\/ISSCC.2014.6757353","article-title":"POWERS&#x2122;: A 12-Core Server-Class Processor in 22nm SOl with 7.6Tb\/s Off-Chip Bandwidth","author":"fluhr","year":"2014","journal-title":"IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC)"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2004.1261846"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.1996.569578"},{"key":"ref21","article-title":"eFinale - Integration Platform for High Performance","author":"neves","year":"2011","journal-title":"Design Automation Conference (DAC)"}],"event":{"name":"2014 IEEE Custom Integrated Circuits Conference - CICC 2014","location":"San Jose, CA, USA","start":{"date-parts":[[2014,9,15]]},"end":{"date-parts":[[2014,9,17]]}},"container-title":["Proceedings of the IEEE 2014 Custom Integrated Circuits Conference"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6924030\/6945974\/06946042.pdf?arnumber=6946042","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,17]],"date-time":"2019-08-17T08:39:31Z","timestamp":1566031171000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6946042\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,9]]},"references-count":21,"URL":"https:\/\/doi.org\/10.1109\/cicc.2014.6946042","relation":{},"subject":[],"published":{"date-parts":[[2014,9]]}}}