{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,7]],"date-time":"2024-09-07T13:30:02Z","timestamp":1725715802712},"reference-count":12,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014,9]]},"DOI":"10.1109\/cicc.2014.6946092","type":"proceedings-article","created":{"date-parts":[[2014,11,12]],"date-time":"2014-11-12T22:50:10Z","timestamp":1415832610000},"page":"1-4","source":"Crossref","is-referenced-by-count":2,"title":["Independent N and P process monitors for body bias based process corner correction"],"prefix":"10.1109","author":[{"given":"Lawrence T.","family":"Clark","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"David","family":"Kidd","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Vineet","family":"Agrawal","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sam","family":"Leshner","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Gokul","family":"Krishnan","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2003.817120"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2002.803949"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2013.6658516"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ASSCC.2011.6123641"},{"key":"ref11","first-page":"749","article-title":"Advanced Channel Engineering Achieving Aggressive Reduction of VT Variation for Ultra-Low-Power Applications","author":"fujita","year":"2011","journal-title":"Proc IEDM"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2007.893626"},{"key":"ref12","first-page":"14.4.1","article-title":"A Highly Integrated 65nm SoC Process with Enhanced Power\/Performance of Digital and Analog Circuits","author":"clark","year":"2012","journal-title":"Proc IEDM"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2003.810043"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIT.2012.6242497"},{"key":"ref2","first-page":"48","article-title":"A delay distribution squeezing scheme with speed-adaptive threshold-voltage CMOS (SA-Vt CMOS) for low voltage LSls","author":"miyazaki","year":"1998","journal-title":"Proceedings 1998 International Symposium on Low Power Electronics and Design (IEEE Cat No 98TH8379) LPE"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/VLSI.2008.67"},{"key":"ref1","first-page":"338","article-title":"Parameter vananons and impact on circuits and microarchitecture","author":"borkar","year":"2003","journal-title":"Proc DAC"}],"event":{"name":"2014 IEEE Custom Integrated Circuits Conference - CICC 2014","start":{"date-parts":[[2014,9,15]]},"location":"San Jose, CA, USA","end":{"date-parts":[[2014,9,17]]}},"container-title":["Proceedings of the IEEE 2014 Custom Integrated Circuits Conference"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6924030\/6945974\/06946092.pdf?arnumber=6946092","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,24]],"date-time":"2017-03-24T01:48:46Z","timestamp":1490320126000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6946092\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,9]]},"references-count":12,"URL":"https:\/\/doi.org\/10.1109\/cicc.2014.6946092","relation":{},"subject":[],"published":{"date-parts":[[2014,9]]}}}