{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,13]],"date-time":"2026-04-13T14:07:59Z","timestamp":1776089279052,"version":"3.50.1"},"reference-count":79,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2017,4]]},"DOI":"10.1109\/cicc.2017.7993626","type":"proceedings-article","created":{"date-parts":[[2017,8,9]],"date-time":"2017-08-09T16:07:33Z","timestamp":1502294853000},"page":"1-8","source":"Crossref","is-referenced-by-count":172,"title":["Hardware for machine learning: Challenges and opportunities"],"prefix":"10.1109","author":[{"given":"Vivienne","family":"Sze","sequence":"first","affiliation":[]},{"given":"Yu-Hsin","family":"Chen","sequence":"additional","affiliation":[]},{"given":"Joel","family":"Emer","sequence":"additional","affiliation":[]},{"given":"Amr","family":"Suleiman","sequence":"additional","affiliation":[]},{"given":"Zhengdong","family":"Zhang","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref73","article-title":"Neurocube: A programmable digital neuromorphic architecture with high-density 3D memory","author":"kim","year":"2016","journal-title":"ISCA"},{"key":"ref72","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2284350"},{"key":"ref71","article-title":"RedEye: analog ConvNet image sensor architecture for continuous mobile vision","author":"likamwa","year":"2016","journal-title":"ISCA"},{"key":"ref70","article-title":"A 2.5 GHz 7.7 TOPS\/W switched-capacitor matrix multiplier with co-designed local memory in 40nm","author":"lee","year":"2016","journal-title":"ISSCC"},{"key":"ref76","doi-asserted-by":"publisher","DOI":"10.1038\/nature14441"},{"key":"ref77","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2012.6330604"},{"key":"ref74","article-title":"ISAAC: A Convolutional Neural Network Accelerator with In-Situ Analog Arithmetic in Crossbars","author":"shafiee","year":"2016","journal-title":"ISCA"},{"key":"ref39","article-title":"A 1.93TOPS\/W scalable deep learning\/inference processor with tetra-parallel MIMD architecture for big-data applications","author":"park","year":"2015","journal-title":"ISSCC"},{"key":"ref75","article-title":"PRIME: A Novel Processing-In-Memory Architecture for Neural Network Computation in ReRAM-based Main Memory","author":"chi","year":"2016","journal-title":"ISCA"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/CVPRW.2014.106"},{"key":"ref78","article-title":"A 0.48 V 0.57 nJ\/pixel video-recording SoC in 65nm CMOS","author":"lin","year":"2013","journal-title":"ISSCC"},{"key":"ref79","article-title":"Closing the Energy Gap Between HOG and CNN Features for Embedded Vision","author":"suleiman","year":"2017","journal-title":"ISCAS"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR.2016.435"},{"key":"ref32","article-title":"Minimizing computation in convolutional neural networks","author":"cong","year":"2014","journal-title":"ICANN"},{"key":"ref31","article-title":"Exact acceleration of linear object detectors","author":"dubout","year":"2012","journal-title":"ECCV"},{"key":"ref30","article-title":"Fast training of convolutional networks through FFTs","author":"mathieu","year":"2014","journal-title":"ICLRE"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1145\/1815961.1815993"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/FPT.2010.5681487"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/ASAP.2009.25"},{"key":"ref34","article-title":"Eyeriss: A Spatial Architecture for Energy-Efficient Dataflow for Convolutional Neural Networks","author":"chen","year":"2016","journal-title":"ISCA"},{"key":"ref60","article-title":"Learning both Weights and Connections for Efficient Neural Network","author":"han","year":"2015","journal-title":"NIPS"},{"key":"ref62","article-title":"Cnvlutin: ineffectual-neuron-free deep neural network computing","author":"albericio","year":"2016","journal-title":"ISCA"},{"key":"ref61","author":"yang","year":"2016","journal-title":"Designing Energy-Efficient Convolutional Neural Networks using Energy-Aware Pruning"},{"key":"ref63","article-title":"EIE: efficient inference engine on compressed deep neural network","author":"han","year":"2016","journal-title":"ISCA"},{"key":"ref28","author":"lecun","year":"0","journal-title":"The MNIST Database of Handwritten Digits"},{"key":"ref64","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2616357"},{"key":"ref27","article-title":"Very Deep Convolutional Networks for Large-Scale Image Recognition","author":"simonyan","year":"2015","journal-title":"ICLRE"},{"key":"ref65","article-title":"Deep Compression: Compressing Deep Neural Network with Pruning, Trained Quantization and Huffman Coding","author":"han","year":"2016","journal-title":"ICLRE"},{"key":"ref66","article-title":"A machine-learning classifier implemented in a standard 6T SRAM array","author":"zhang","year":"2016","journal-title":"VLSI Sympo"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2014.6757323"},{"key":"ref67","doi-asserted-by":"publisher","DOI":"10.1109\/ICASSP.2014.6854329"},{"key":"ref68","doi-asserted-by":"publisher","DOI":"10.1109\/ACSSC.2015.7421361"},{"key":"ref69","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2015.7063061"},{"key":"ref2","article-title":"For a Trillion Sensor Road Map","year":"2013","journal-title":"TSensorSummit"},{"key":"ref1","author":"marr","year":"2015","journal-title":"Big Data 20 Mind-Boggling Facts Everyone Must Read"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR.2015.7298594"},{"key":"ref22","article-title":"Batch normalization: Accelerating deep network training by reducing internal covariate shift","author":"ioffe","year":"2015","journal-title":"ICML"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR.2016.90"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/5.726791"},{"key":"ref23","article-title":"Rectified Linear Units Improve Restricted Boltzmann Machines","author":"nair","year":"2010","journal-title":"ICML"},{"key":"ref26","article-title":"ImageNet Classification with Deep Convolutional Neural Networks","author":"krizhevsky","year":"2012","journal-title":"NIPS"},{"key":"ref25","author":"emer","year":"2016","journal-title":"Tutorial on Hardware Architectures for Deep Neural Networks"},{"key":"ref50","article-title":"A 58.6 mW real-time programmable object detector with multi-scale multi-object support using deformable parts model on 1920&#x00D7; 1080 video at 30fps","author":"suleiman","year":"2016","journal-title":"VLSI Sympo"},{"key":"ref51","article-title":"Hardware-oriented Approximation of Convolutional Neural Networks","author":"gysel","year":"2016","journal-title":"ICLRE"},{"key":"ref59","article-title":"Optimal Brain Damage","author":"lecun","year":"1990","journal-title":"NIPS"},{"key":"ref58","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2016.111"},{"key":"ref57","article-title":"XNOR-Net: ImageNet Classification Using Binary Convolutional Neural Networks","author":"rastegari","year":"2016","journal-title":"ECCV"},{"key":"ref56","author":"courbariaux","year":"2016","journal-title":"BinaryNet Training Deep Neural Networks with Weights and Activations Constrained to +1 or ?1"},{"key":"ref55","article-title":"Binaryconnect: Training deep neural networks with binary weights during propagations","author":"courbariaux","year":"2015","journal-title":"NIPS"},{"key":"ref54","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2016.7783722"},{"key":"ref53","article-title":"A 0.3&#x2013;2.6 TOPS\/W precision-scalable processor for real-time large-scale ConvNets","author":"moons","year":"2016","journal-title":"VLSI Sympo"},{"key":"ref52","article-title":"Google Takes Unconventional Route with Homegrown Machine Learning Chips","author":"higginbotham","year":"2016","journal-title":"NextBio Platform"},{"key":"ref10","article-title":"A micro-power EEG acquisition SoC with integrated seizure detection processor for continuous patient monitoring","author":"verma","year":"2009","journal-title":"VLSI Sympo"},{"key":"ref11","article-title":"1.4?W\/channel 16-channel EEG\/ECoG processor for smart brain sensor SoC","author":"chen","year":"2010","journal-title":"VLSI Sympo"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1145\/2742060.2743766"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2253226"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR.2005.177"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ICCV.1999.790410"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1017\/CBO9780511801389"},{"key":"ref16","author":"schapire","year":"2012","journal-title":"Boosting Foundations and Algorithms"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1038\/nature14539"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1007\/s11263-015-0816-y"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2010.5537907"},{"key":"ref4","year":"2016","journal-title":"Cisco Global Cloud Index Forecast and Methodology"},{"key":"ref3","year":"2015","journal-title":"Gartner Says 6 4 Billion Connected &#x201C;Things&#x201D; Will Be in Use in 2016 Up 30 Percent From 2015"},{"key":"ref6","author":"woodhouse","year":"2016","journal-title":"Big big big data higher and higher resolution video surveillance"},{"key":"ref5","year":"2016","journal-title":"Visual Network Index (VNI) Complete Forecast Highlights"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2367818"},{"key":"ref7","author":"szeliski","year":"2010","journal-title":"Computer Vision Algorithms and Applications"},{"key":"ref49","doi-asserted-by":"publisher","DOI":"10.1109\/TPAMI.2009.167"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2016.7783750"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2014.58"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1145\/2541940.2541967"},{"key":"ref48","doi-asserted-by":"publisher","DOI":"10.1109\/SiPS.2014.6986096"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2016.7418007"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1145\/2749469.2750389"},{"key":"ref41","article-title":"Deep Learning with Limited Numerical Precision","author":"gupta","year":"2015","journal-title":"ICML"},{"key":"ref44","article-title":"Optimizing FPGA-based Accelerator Design for Deep Convolutional Neural Networks","author":"zhang","year":"2015","journal-title":"FPGA"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2013.6657019"}],"event":{"name":"2017 IEEE Custom Integrated Circuits Conference (CICC)","location":"Austin, TX","start":{"date-parts":[[2017,4,30]]},"end":{"date-parts":[[2017,5,3]]}},"container-title":["2017 IEEE Custom Integrated Circuits Conference (CICC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7986634\/7993450\/07993626.pdf?arnumber=7993626","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,2,2]],"date-time":"2020-02-02T11:17:31Z","timestamp":1580642251000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/7993626\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,4]]},"references-count":79,"URL":"https:\/\/doi.org\/10.1109\/cicc.2017.7993626","relation":{},"subject":[],"published":{"date-parts":[[2017,4]]}}}