{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,13]],"date-time":"2026-05-13T06:48:27Z","timestamp":1778654907819,"version":"3.51.4"},"reference-count":8,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2017,4]]},"DOI":"10.1109\/cicc.2017.7993627","type":"proceedings-article","created":{"date-parts":[[2017,8,9]],"date-time":"2017-08-09T16:07:33Z","timestamp":1502294853000},"page":"1-4","source":"Crossref","is-referenced-by-count":30,"title":["A scalable time-based integrate-and-fire neuromorphic core with brain-inspired leak and local lateral inhibition capabilities"],"prefix":"10.1109","author":[{"given":"Muqing","family":"Liu","sequence":"first","affiliation":[]},{"given":"Luke R.","family":"Everson","sequence":"additional","affiliation":[]},{"given":"Chris H.","family":"Kim","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2016.7418004"},{"key":"ref3","year":"1998","journal-title":"The MNIST Database of Handwritten Digits"},{"key":"ref6","article-title":"A 1.93TOPS\/W Scalable Deep Learning\/Inference Processor with Tetra-Parallel MIMD Architecture for Big-Data Applications","author":"park","year":"2015","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC)"},{"key":"ref5","first-page":"180","article-title":"A 1.40mm2 141mW 898GOPS Sparse Neuromorphic Processor in 40nm CMOS","author":"knag","year":"2016","journal-title":"2016 Symposium on VLSI Circuits"},{"key":"ref8","article-title":"A Digital Neuromorphic Core Using Embedded Crossbar Memory with 45pJ per Spike in 45nm","author":"merolla","year":"2011","journal-title":"IEEE Int Custom Integrated Circuits Conference (CICC)"},{"key":"ref7","article-title":"A 1TOPS\/W Analog Deep Machine-Learning Engine with Floating-Gate Storage in 0.13um CMOS","author":"lu","year":"2014","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC)"},{"key":"ref2","doi-asserted-by":"crossref","first-page":"668","DOI":"10.1126\/science.1254642","article-title":"A Million Spiking-Neuron Integrated Circuit with a Scalable Communication Network and Interface","volume":"345","author":"merolla","year":"2014","journal-title":"Science"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/5.58356"}],"event":{"name":"2017 IEEE Custom Integrated Circuits Conference (CICC)","location":"Austin, TX","start":{"date-parts":[[2017,4,30]]},"end":{"date-parts":[[2017,5,3]]}},"container-title":["2017 IEEE Custom Integrated Circuits Conference (CICC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7986634\/7993450\/07993627.pdf?arnumber=7993627","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,10,2]],"date-time":"2019-10-02T01:42:06Z","timestamp":1569980526000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7993627\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,4]]},"references-count":8,"URL":"https:\/\/doi.org\/10.1109\/cicc.2017.7993627","relation":{},"subject":[],"published":{"date-parts":[[2017,4]]}}}