{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,30]],"date-time":"2025-12-30T08:55:44Z","timestamp":1767084944675},"reference-count":7,"publisher":"IEEE","license":[{"start":{"date-parts":[[2019,4,1]],"date-time":"2019-04-01T00:00:00Z","timestamp":1554076800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,4,1]],"date-time":"2019-04-01T00:00:00Z","timestamp":1554076800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,4,1]],"date-time":"2019-04-01T00:00:00Z","timestamp":1554076800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2019,4]]},"DOI":"10.1109\/cicc.2019.8780309","type":"proceedings-article","created":{"date-parts":[[2019,8,1]],"date-time":"2019-08-01T20:03:04Z","timestamp":1564689784000},"page":"1-4","source":"Crossref","is-referenced-by-count":1,"title":["Voltage-Follower Coupling Quadrature Oscillator with Embedded Phase-Interpolator in 16nm FinFET"],"prefix":"10.1109","author":[{"given":"Xi","family":"Chen","sequence":"first","affiliation":[]},{"given":"Sanquan","family":"Song","sequence":"additional","affiliation":[]},{"given":"John","family":"Poulton","sequence":"additional","affiliation":[]},{"given":"Nikola","family":"Nedovic","sequence":"additional","affiliation":[]},{"given":"Brian","family":"Zimmer","sequence":"additional","affiliation":[]},{"given":"Stephen","family":"Tell","sequence":"additional","affiliation":[]},{"given":"C. Thomas","family":"Gray","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","first-page":"390","article-title":"A 4-to-16GHz Inverter-Based Injection-Locked Quadrature Clock Generator with Phase Interpolators for Multi-Standard I\/Os in 7nm FinFET","author":"chen","year":"2018","journal-title":"Proc ISSCC"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2018.8310291"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2011.2142810"},{"key":"ref5","article-title":"A 112 Gb\/s PAM-4 56 Gb\/s NRZ Reconfigurable Transmitter With Three-Tap FFE in 10-nm FinFET","author":"kim","year":"2018","journal-title":"IEEE JSSC"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.1993.280059"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2015.7062928"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2016.7417967"}],"event":{"name":"2019 IEEE Custom Integrated Circuits Conference (CICC)","start":{"date-parts":[[2019,4,14]]},"location":"Austin, TX, USA","end":{"date-parts":[[2019,4,17]]}},"container-title":["2019 IEEE Custom Integrated Circuits Conference (CICC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8767369\/8780115\/08780309.pdf?arnumber=8780309","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,18]],"date-time":"2022-07-18T10:51:20Z","timestamp":1658141480000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8780309\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,4]]},"references-count":7,"URL":"https:\/\/doi.org\/10.1109\/cicc.2019.8780309","relation":{},"subject":[],"published":{"date-parts":[[2019,4]]}}}