{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,8]],"date-time":"2024-09-08T08:09:51Z","timestamp":1725782991226},"reference-count":7,"publisher":"IEEE","license":[{"start":{"date-parts":[[2020,3,1]],"date-time":"2020-03-01T00:00:00Z","timestamp":1583020800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2020,3,1]],"date-time":"2020-03-01T00:00:00Z","timestamp":1583020800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2020,3,1]],"date-time":"2020-03-01T00:00:00Z","timestamp":1583020800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2020,3]]},"DOI":"10.1109\/cicc48029.2020.9075918","type":"proceedings-article","created":{"date-parts":[[2020,4,24]],"date-time":"2020-04-24T00:53:24Z","timestamp":1587689604000},"page":"1-4","source":"Crossref","is-referenced-by-count":3,"title":["A Configurable Dual-Mode PRINCE Cipher with Security Aware Pipelining in 65nm for High Throughput Applications"],"prefix":"10.1109","author":[{"given":"Nael Mizanur","family":"Rahman","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Edward","family":"Lee","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Venkata Chaitanya","family":"Krishna Chekuri","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Arvind","family":"Singh","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Saibal","family":"Mukhopadhyay","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"journal-title":"VLSI","year":"0","author":"miura","key":"ref4"},{"journal-title":"Host","year":"0","author":"chawla","key":"ref3"},{"journal-title":"JSSC","year":"0","author":"mathew","key":"ref6"},{"journal-title":"JSSC","year":"0","author":"singh","key":"ref5"},{"journal-title":"VLSI","year":"0","author":"satpathy","key":"ref7"},{"journal-title":"ICCF","year":"0","author":"yoshikawa","key":"ref2"},{"journal-title":"ASIACRYPT","year":"0","author":"borghoff","key":"ref1"}],"event":{"name":"2020 IEEE Custom Integrated Circuits Conference (CICC)","start":{"date-parts":[[2020,3,22]]},"location":"Boston, MA, USA","end":{"date-parts":[[2020,3,25]]}},"container-title":["2020 IEEE Custom Integrated Circuits Conference (CICC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9060424\/9075871\/09075918.pdf?arnumber=9075918","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,6,27]],"date-time":"2022-06-27T15:40:51Z","timestamp":1656344451000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9075918\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,3]]},"references-count":7,"URL":"https:\/\/doi.org\/10.1109\/cicc48029.2020.9075918","relation":{},"subject":[],"published":{"date-parts":[[2020,3]]}}}