{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,12]],"date-time":"2025-09-12T17:58:08Z","timestamp":1757699888872},"reference-count":7,"publisher":"IEEE","license":[{"start":{"date-parts":[[2022,4,1]],"date-time":"2022-04-01T00:00:00Z","timestamp":1648771200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2022,4,1]],"date-time":"2022-04-01T00:00:00Z","timestamp":1648771200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2022,4]]},"DOI":"10.1109\/cicc53496.2022.9772856","type":"proceedings-article","created":{"date-parts":[[2022,5,18]],"date-time":"2022-05-18T15:37:56Z","timestamp":1652888276000},"page":"1-2","source":"Crossref","is-referenced-by-count":4,"title":["PVT Tolerant Zero Bit-Error-Rate Physical Unclonable Function Exploiting Hot Carrier Injection Aging in 7nm FinFET Technology"],"prefix":"10.1109","author":[{"given":"Jyothi Bhaskarr","family":"Velamala","sequence":"first","affiliation":[{"name":"Intel,Hillsboro,OR"}]},{"given":"Siang-jhih Sean","family":"Wu","sequence":"additional","affiliation":[{"name":"lntel,Folsom,CA"}]},{"given":"Padma","family":"Penmatsa","sequence":"additional","affiliation":[{"name":"lntel,Folsom,CA"}]},{"given":"Kuan-Yueh James","family":"Shen","sequence":"additional","affiliation":[{"name":"Intel,Hillsboro,OR"}]},{"given":"David","family":"Johnston","sequence":"additional","affiliation":[{"name":"Intel,Hillsboro,OR"}]},{"given":"Rachael","family":"Parker","sequence":"additional","affiliation":[{"name":"Intel,Hillsboro,OR"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2016.2569581"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-40349-1_5"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS.2015.7112692"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/CICC48029.2020.9075875"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/2517300.2517301"},{"key":"ref2","article-title":"13fJ\/bit Probing-resilient 250K PUF Array with Soft Dark-bit Masking for 1.94% Bit-error in 22nm Tri-gate CMOS","author":"satpathy","year":"2014","journal-title":"ESSCIRC"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2014.6757433"}],"event":{"name":"2022 IEEE Custom Integrated Circuits Conference (CICC)","start":{"date-parts":[[2022,4,24]]},"location":"Newport Beach, CA, USA","end":{"date-parts":[[2022,4,27]]}},"container-title":["2022 IEEE Custom Integrated Circuits Conference (CICC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9772767\/9772730\/09772856.pdf?arnumber=9772856","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,6,27]],"date-time":"2022-06-27T16:57:47Z","timestamp":1656349067000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9772856\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,4]]},"references-count":7,"URL":"https:\/\/doi.org\/10.1109\/cicc53496.2022.9772856","relation":{},"subject":[],"published":{"date-parts":[[2022,4]]}}}