{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,30]],"date-time":"2026-01-30T08:03:55Z","timestamp":1769760235496,"version":"3.49.0"},"reference-count":4,"publisher":"IEEE","license":[{"start":{"date-parts":[[2023,4,1]],"date-time":"2023-04-01T00:00:00Z","timestamp":1680307200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,4,1]],"date-time":"2023-04-01T00:00:00Z","timestamp":1680307200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2023,4]]},"DOI":"10.1109\/cicc57935.2023.10121261","type":"proceedings-article","created":{"date-parts":[[2023,5,11]],"date-time":"2023-05-11T17:23:55Z","timestamp":1683825835000},"page":"1-2","source":"Crossref","is-referenced-by-count":14,"title":["A 26GHz Fractional-N Charge-Pump PLL Based on A Dual-DTC-Assisted Time-Amplifying-Phase-Frequency Detector Achieving 37.1fs and 45.6fs rms Jitter for Integer-N and Fractional-N Channels"],"prefix":"10.1109","author":[{"given":"Xinlin","family":"Geng","sequence":"first","affiliation":[{"name":"University of Electronic Science and Technology of China"}]},{"given":"Zonglin","family":"Ye","sequence":"additional","affiliation":[{"name":"University of Electronic Science and Technology of China"}]},{"given":"Yao","family":"Xiao","sequence":"additional","affiliation":[{"name":"University of Electronic Science and Technology of China"}]},{"given":"Oian","family":"Xie","sequence":"additional","affiliation":[{"name":"University of Electronic Science and Technology of China"}]},{"given":"Zheng","family":"Wang","sequence":"additional","affiliation":[{"name":"University of Electronic Science and Technology of China"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2314436"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2021.3123827"},{"key":"ref2","article-title":"A 68.6fsrms-total-integrated-jitter and 1.56?s-locking-time fractional-N bang-bang PLL based on type-II gear shifting and adaptive frequency switching","author":"dartizio","year":"2022","journal-title":"ISSCC"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42614.2022.9731578"}],"event":{"name":"2023 IEEE Custom Integrated Circuits Conference (CICC)","location":"San Antonio, TX, USA","start":{"date-parts":[[2023,4,23]]},"end":{"date-parts":[[2023,4,26]]}},"container-title":["2023 IEEE Custom Integrated Circuits Conference (CICC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/10121189\/10121178\/10121261.pdf?arnumber=10121261","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,6,12]],"date-time":"2023-06-12T17:51:40Z","timestamp":1686592300000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10121261\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,4]]},"references-count":4,"URL":"https:\/\/doi.org\/10.1109\/cicc57935.2023.10121261","relation":{},"subject":[],"published":{"date-parts":[[2023,4]]}}}