{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T00:20:37Z","timestamp":1729642837623,"version":"3.28.0"},"reference-count":15,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,3]]},"DOI":"10.1109\/ciss.2015.7086836","type":"proceedings-article","created":{"date-parts":[[2015,4,16]],"date-time":"2015-04-16T15:16:48Z","timestamp":1429197408000},"page":"1-5","source":"Crossref","is-referenced-by-count":0,"title":["One-sided binary tree-crossbar switching for on-chip networks"],"prefix":"10.1109","author":[{"given":"A.","family":"Yavuz Oruc","sequence":"first","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2007.29"},{"journal-title":"Full-Duplex One-Sided Crosspoint Switch","year":"1987","author":"georgiou","key":"ref11"},{"key":"ref12","first-page":"943","article-title":"Reduction of cross-points in one-sided crosspoint switching networks","author":"varma","year":"1989","journal-title":"Proc of the Eighth Annual Joint Conference of the IEEE Comput and Commun Societies"},{"journal-title":"One-sided switching network EP0336301","year":"1990","author":"jajszczyk","key":"ref13"},{"journal-title":"One-sided crosspoint switch with distributed control","year":"1991","author":"georgiou","key":"ref14"},{"article-title":"Control architecture and implementation for switches with carrier sensing","year":"2011","author":"hui","key":"ref15"},{"journal-title":"Reconfigurable network on a chip","year":"2008","author":"ramos","key":"ref4"},{"journal-title":"On-chip switch fabric","year":"2006","author":"regula","key":"ref3"},{"article-title":"Strict-sense minimal spanning switch nonblocking architecture","year":"2012","author":"haas","key":"ref6"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/NOCS.2010.27"},{"key":"ref8","doi-asserted-by":"crossref","first-page":"1445","DOI":"10.1109\/TC.2012.295","article-title":"Floor-plan optimization of fat-tree-based networks-on-chip for chip multiprocessors","volume":"63","author":"wang","year":"2014","journal-title":"IEEE Trans On Comput"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2011.2181546"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2002.1016885"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/378239.379048"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/1273440.1250679"}],"event":{"name":"2015 49th Annual Conference on Information Sciences and Systems (CISS)","start":{"date-parts":[[2015,3,18]]},"location":"Baltimore, MD, USA","end":{"date-parts":[[2015,3,20]]}},"container-title":["2015 49th Annual Conference on Information Sciences and Systems (CISS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7075844\/7086424\/07086836.pdf?arnumber=7086836","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,23]],"date-time":"2019-08-23T11:57:48Z","timestamp":1566561468000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7086836\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,3]]},"references-count":15,"URL":"https:\/\/doi.org\/10.1109\/ciss.2015.7086836","relation":{},"subject":[],"published":{"date-parts":[[2015,3]]}}}