{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,10]],"date-time":"2025-10-10T21:38:10Z","timestamp":1760132290245},"reference-count":23,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2013,9]]},"DOI":"10.1109\/codes-isss.2013.6659012","type":"proceedings-article","created":{"date-parts":[[2013,11,21]],"date-time":"2013-11-21T10:52:07Z","timestamp":1385031127000},"page":"1-10","source":"Crossref","is-referenced-by-count":8,"title":["Improved formal worst-case timing analysis of weighted round robin scheduling for Ethernet"],"prefix":"10.1109","author":[{"given":"Daniel","family":"Thiele","sequence":"first","affiliation":[]},{"given":"Jonas","family":"Diemer","sequence":"additional","affiliation":[]},{"given":"Philip","family":"Axer","sequence":"additional","affiliation":[]},{"given":"Rolf","family":"Ernst","sequence":"additional","affiliation":[]},{"given":"Jan","family":"Seyler","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"19","doi-asserted-by":"publisher","DOI":"10.1145\/1450135.1450177"},{"key":"22","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2000.858698"},{"key":"17","doi-asserted-by":"crossref","DOI":"10.1007\/978-3-642-22875-9_20","article-title":"Worst-case traversal time modelling of ethernet based in-car networks using real time calculus","author":"revsbech","year":"2011","journal-title":"Proceedings of the International Conferences on Smart Spaces and Next Generation Wired\/wireless Networking NEW2AN'11\/ruSMART'11"},{"journal-title":"An Extensible Approach for Analysing Fixed Priority Hard Real-Time Tasks","year":"1994","author":"tindell","key":"23"},{"year":"0","author":"rox","key":"18"},{"key":"15","doi-asserted-by":"publisher","DOI":"10.1109\/RTSS.2012.80"},{"key":"16","doi-asserted-by":"publisher","DOI":"10.1109\/EMRTS.2003.1212721"},{"journal-title":"Network Calculus A Theory of Deterministic Queuing Systems for the Internet","year":"2001","author":"le boudec","key":"13"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2006.881986"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/49.105173"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1109\/ISORC.2005.56"},{"key":"21","doi-asserted-by":"publisher","DOI":"10.1145\/2380445.2380518"},{"year":"0","author":"cummings","key":"3"},{"key":"20","doi-asserted-by":"crossref","DOI":"10.1145\/217382.217453","article-title":"Efficient fair queueing using deficit round robin","author":"shreedhar","year":"1995","journal-title":"Proceedings of the Conference on Applications Technologies Architectures and Protocols for Computer Communication SIGCOMM '95"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/ECRTS.2012.12"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2010.5456993"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/ETFA.2009.5347126"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2005.413"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/SIES.2012.6356564"},{"key":"5","article-title":"Modeling of ethernet AVB networks for worst-case timing analysis","author":"diemer","year":"2012","journal-title":"MATHMOO Vienna Conference on Mathematical Modelling"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1007\/s11241-007-9012-7"},{"key":"9","doi-asserted-by":"crossref","DOI":"10.1049\/ip-cdt:20045088","article-title":"System Level Performance Analysis - The SymTA\/S Approach","author":"henia","year":"2005","journal-title":"IEE Proceedings Computers and Digital Techniques"},{"key":"8","article-title":"Response time analysis in AFDX networks","author":"gutie?rrez","year":"2011","journal-title":"XIV Jornadas de Tiempo Real"}],"event":{"name":"2013 International Conference on Hardware\/Software Codesign and System Synthesis (CODES+ISSS)","start":{"date-parts":[[2013,9,29]]},"location":"Montreal, QC, Canada","end":{"date-parts":[[2013,10,4]]}},"container-title":["2013 International Conference on Hardware\/Software Codesign and System Synthesis (CODES+ISSS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6648477\/6658981\/06659012.pdf?arnumber=6659012","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,21]],"date-time":"2017-06-21T22:53:59Z","timestamp":1498085639000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6659012\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,9]]},"references-count":23,"URL":"https:\/\/doi.org\/10.1109\/codes-isss.2013.6659012","relation":{},"subject":[],"published":{"date-parts":[[2013,9]]}}}