{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T13:43:51Z","timestamp":1725543831718},"reference-count":8,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018,9]]},"DOI":"10.1109\/codesisss.2018.8525932","type":"proceedings-article","created":{"date-parts":[[2018,11,8]],"date-time":"2018-11-08T18:28:45Z","timestamp":1541701725000},"page":"1-2","source":"Crossref","is-referenced-by-count":1,"title":["Work-in-Progress: Dynamic Data Management for Automotive ECUs with Hybrid RAM-NVM Memory"],"prefix":"10.1109","author":[{"given":"Jinyu","family":"Zhan","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Junhuan","family":"Yang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Wei","family":"Jiang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yixin","family":"Li","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TTE.2016.2519821"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TITS.2017.2672542"},{"key":"ref6","first-page":"936","article-title":"An Operating System Level Data Migration Scheme in Hybrid DRAM-NVM Memory Architecture","author":"reza salkhordeh","year":"2016","journal-title":"Design Automation Test in Europe Conference Exhibition (DATE)"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/1629911.1630086"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/LCA.2015.2402435"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/2024716.2024718"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2010.2070050"},{"key":"ref1","first-page":"90","article-title":"Compex: Compression-expansion coding for energy, latency, and lifetime improvements in mlc\/tlc nvm","author":"palangappa","year":"2016","journal-title":"IEEE International Symposium on High-Performance Comp Architecture"}],"event":{"name":"2018 International Conference on Hardware\/Software Codesign and System Synthesis (CODES+ISSS)","start":{"date-parts":[[2018,9,30]]},"location":"Turin","end":{"date-parts":[[2018,10,5]]}},"container-title":["2018 International Conference on Hardware\/Software Codesign and System Synthesis (CODES+ISSS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8509501\/8525497\/08525932.pdf?arnumber=8525932","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,26]],"date-time":"2022-01-26T13:57:52Z","timestamp":1643205472000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8525932\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,9]]},"references-count":8,"URL":"https:\/\/doi.org\/10.1109\/codesisss.2018.8525932","relation":{},"subject":[],"published":{"date-parts":[[2018,9]]}}}