{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,19]],"date-time":"2025-03-19T12:47:59Z","timestamp":1742388479009},"reference-count":23,"publisher":"IEEE Comput. Soc","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/conect.2002.1039253","type":"proceedings-article","created":{"date-parts":[[2003,6,25]],"date-time":"2003-06-25T19:34:26Z","timestamp":1056569666000},"page":"21-27","source":"Crossref","is-referenced-by-count":20,"title":["A power model for routers: modeling Alpha 21364 and InfiniBand routers"],"prefix":"10.1109","author":[{"family":"Hang-Sheng Wang","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Li-Shiuan Peh","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"S.","family":"Malik","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"year":"0","key":"ref10"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/40.988687"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.1997.628902"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2001.903268"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/378239.379045"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/L-CA.2002.10"},{"year":"0","key":"ref16"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/43.924826"},{"key":"ref18","article-title":"An enhanced access and cycle time model for on-chip caches","author":"wilton","year":"1994","journal-title":"Technical Report 93\/5"},{"key":"ref19","article-title":"Analysis of power consumption on switch fabrics in network routers","author":"ye","year":"2002","journal-title":"Proc Design Automation Conference"},{"key":"ref4","article-title":"The Avici terabit switch\/router","author":"dally","year":"1998","journal-title":"Proc Hot Interconnects"},{"key":"ref3","first-page":"83","article-title":"Wattch: a framework for architectural-level power analysis and optimizations","author":"brooks","year":"2000","journal-title":"Proceedings of 27th International Symposium on Computer Architecture (IEEE Cat No RS00201) ISCA"},{"key":"ref6","article-title":"An analytical power estimation model for crossbar interconnects","author":"essakimuthu","year":"2002","journal-title":"Technical Report CSE-02–014"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/378239.379048"},{"key":"ref8","article-title":"Analytical energy dissipation models for low-power caches","author":"kamble","year":"1997","journal-title":"Proc International Symposium on Low Power Electronics and Design"},{"journal-title":"IBM InfiniBand 8-port 12x Switch","year":"0","key":"ref7"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/40.342015"},{"journal-title":"Alpha 21364 (EV7)","year":"0","author":"bannon","key":"ref1"},{"key":"ref9","article-title":"Pipelined memory shared buffer for VLSI switches","author":"katevenis","year":"1995","journal-title":"Proc Conference on Applications Technologies Architectures and Protocols for Computer Communication"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/337292.337436"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/ACSSC.1998.751425"},{"key":"ref21","article-title":"Interconnect architecture exploration for low-energy reconfigurable single-chip DSPs","author":"zhang","year":"1999","journal-title":"Proc IEEE Computer Society Workshop on VLSI"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1145\/280756.280943"}],"event":{"name":"10th Symposium on High Performance Interconnects","acronym":"CONECT-02","location":"Stanford, CA, USA"},"container-title":["Proceedings 10th Symposium on High Performance Interconnects"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8058\/22275\/01039253.pdf?arnumber=1039253","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,10]],"date-time":"2017-03-10T16:28:11Z","timestamp":1489163291000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1039253\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":23,"URL":"https:\/\/doi.org\/10.1109\/conect.2002.1039253","relation":{},"subject":[]}}