{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,23]],"date-time":"2026-04-23T03:58:05Z","timestamp":1776916685910,"version":"3.51.2"},"reference-count":6,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,4]]},"DOI":"10.1109\/coolchips.2015.7158657","type":"proceedings-article","created":{"date-parts":[[2015,7,16]],"date-time":"2015-07-16T17:56:47Z","timestamp":1437069407000},"page":"1-3","source":"Crossref","is-referenced-by-count":3,"title":["Power management on 14 nm Intel® Core− M processor"],"prefix":"10.1109","author":[{"given":"Anant","family":"Deval","sequence":"first","affiliation":[]},{"given":"Avinash","family":"Ananthakrishnan","sequence":"additional","affiliation":[]},{"given":"Craig","family":"Forbell","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","article-title":"The limit of dynamic voltage scaling and insomniac dynamic voltage scaling","volume":"13","author":"zhai","year":"2005","journal-title":"IEEE Transactions on VLSI Systems"},{"key":"ref3","article-title":"Burst Mode Processing: An architectural framework for improving performance in future chip multiProcessorsR","author":"zhang","year":"0","journal-title":"Workshop on Managing Over-provisioned Systems (W-MOS) 2014"},{"key":"ref6","article-title":"Haswell: A family of IA 22nm Processors","volume":"50","author":"kurd","year":"2015","journal-title":"IEEE JSSC"},{"key":"ref5","first-page":"50","article-title":"Energy Efficient computing: Power Management system on the Nehalem Family of processors","volume":"14","author":"gunther","year":"2010","journal-title":"Intel® Technology Journal"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/THERMINIC.2013.6675226"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2012.12"}],"event":{"name":"2015 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS XVIII)","location":"Yokohama, Japan","start":{"date-parts":[[2015,4,13]]},"end":{"date-parts":[[2015,4,15]]}},"container-title":["2015 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS XVIII)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7148313\/7158521\/07158657.pdf?arnumber=7158657","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,24]],"date-time":"2017-03-24T17:06:58Z","timestamp":1490375218000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7158657\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,4]]},"references-count":6,"URL":"https:\/\/doi.org\/10.1109\/coolchips.2015.7158657","relation":{},"subject":[],"published":{"date-parts":[[2015,4]]}}}