{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,8,24]],"date-time":"2025-08-24T01:51:49Z","timestamp":1756000309900},"reference-count":29,"publisher":"IEEE","license":[{"start":{"date-parts":[[2020,7,1]],"date-time":"2020-07-01T00:00:00Z","timestamp":1593561600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2020,7,1]],"date-time":"2020-07-01T00:00:00Z","timestamp":1593561600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2020,7,1]],"date-time":"2020-07-01T00:00:00Z","timestamp":1593561600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2020,7]]},"DOI":"10.1109\/dac18072.2020.9218718","type":"proceedings-article","created":{"date-parts":[[2020,10,9]],"date-time":"2020-10-09T19:57:03Z","timestamp":1602273423000},"page":"1-6","source":"Crossref","is-referenced-by-count":11,"title":["Analysis and Optimization of the Implicit Broadcasts in FPGA HLS to Improve Maximum Frequency"],"prefix":"10.1109","author":[{"given":"Licheng","family":"Guo","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jason","family":"Lau","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yuze","family":"Chi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jie","family":"Wang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Cody Hao","family":"Yu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Zhe","family":"Chen","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Zhiru","family":"Zhang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jason","family":"Cong","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"doi-asserted-by":"publisher","key":"ref1","DOI":"10.1109\/FCCM.2019.00027"},{"doi-asserted-by":"publisher","key":"ref2","DOI":"10.1145\/3240765.3240850"},{"doi-asserted-by":"publisher","key":"ref3","DOI":"10.1109\/FCCM.2016.50"},{"author":"Cong","journal-title":"DAC \u201918","article-title":"Automated accelerator generation and optimization with com-posable, parallel and pipeline architecture","key":"ref4"},{"doi-asserted-by":"publisher","key":"ref5","DOI":"10.1145\/3377811.3380340"},{"doi-asserted-by":"publisher","key":"ref6","DOI":"10.1016\/j.entcs.2005.05.036"},{"doi-asserted-by":"publisher","key":"ref7","DOI":"10.1145\/2554688.2554775"},{"journal-title":"Intel Hyperflex Architecture High-Performance Design Handbook","first-page":"57","key":"ref8"},{"doi-asserted-by":"publisher","key":"ref9","DOI":"10.1145\/3218603.3218637"},{"doi-asserted-by":"publisher","key":"ref10","DOI":"10.1145\/3020078.3021753"},{"doi-asserted-by":"publisher","key":"ref11","DOI":"10.1145\/3174243.3174255"},{"doi-asserted-by":"publisher","key":"ref12","DOI":"10.1109\/DAC18072.2020.9218680"},{"doi-asserted-by":"publisher","key":"ref13","DOI":"10.1109\/ICCAD.1991.185212"},{"doi-asserted-by":"publisher","key":"ref14","DOI":"10.1145\/2422.322412"},{"doi-asserted-by":"publisher","key":"ref15","DOI":"10.1145\/123186.123303"},{"doi-asserted-by":"publisher","key":"ref16","DOI":"10.1109\/ICCAD.1996.568938"},{"doi-asserted-by":"publisher","key":"ref17","DOI":"10.1145\/775832.775885"},{"doi-asserted-by":"publisher","key":"ref18","DOI":"10.1145\/611817.611845"},{"key":"ref19","first-page":"383","author":"Weaver","year":"2008","journal-title":"Retiming, repipelining and c-slow retiming"},{"volume-title":"US Patent 7,120,883","author":"Van Antwerpen","article-title":"Register retiming technique","key":"ref20"},{"doi-asserted-by":"publisher","key":"ref21","DOI":"10.1109\/FPL.2018.00042"},{"doi-asserted-by":"publisher","key":"ref22","DOI":"10.1145\/2744769.2744801"},{"doi-asserted-by":"publisher","key":"ref23","DOI":"10.1145\/2684746.2689063"},{"doi-asserted-by":"publisher","key":"ref24","DOI":"10.1109\/ASICON.2015.7516905"},{"doi-asserted-by":"publisher","key":"ref25","DOI":"10.1109\/VLSI-DAT.2016.7482547"},{"doi-asserted-by":"publisher","key":"ref26","DOI":"10.1145\/2160916.2160952"},{"doi-asserted-by":"publisher","key":"ref27","DOI":"10.1145\/2744769.2744893"},{"doi-asserted-by":"publisher","key":"ref28","DOI":"10.1109\/ICICDT.2018.8399766"},{"doi-asserted-by":"publisher","key":"ref29","DOI":"10.1109\/FCCM.2018.00028"}],"event":{"name":"2020 57th ACM\/IEEE Design Automation Conference (DAC)","start":{"date-parts":[[2020,7,20]]},"location":"San Francisco, CA, USA","end":{"date-parts":[[2020,7,24]]}},"container-title":["2020 57th ACM\/IEEE Design Automation Conference (DAC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9211868\/9218488\/09218718.pdf?arnumber=9218718","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,1,24]],"date-time":"2024-01-24T01:16:44Z","timestamp":1706059004000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9218718\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,7]]},"references-count":29,"URL":"https:\/\/doi.org\/10.1109\/dac18072.2020.9218718","relation":{},"subject":[],"published":{"date-parts":[[2020,7]]}}}