{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,5]],"date-time":"2026-06-05T15:52:52Z","timestamp":1780674772650,"version":"3.54.1"},"reference-count":18,"publisher":"IEEE","license":[{"start":{"date-parts":[[2021,12,5]],"date-time":"2021-12-05T00:00:00Z","timestamp":1638662400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2021,12,5]],"date-time":"2021-12-05T00:00:00Z","timestamp":1638662400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2021,12,5]],"date-time":"2021-12-05T00:00:00Z","timestamp":1638662400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2021,12,5]]},"DOI":"10.1109\/dac18074.2021.9586139","type":"proceedings-article","created":{"date-parts":[[2021,11,8]],"date-time":"2021-11-08T23:30:34Z","timestamp":1636414234000},"page":"1219-1224","source":"Crossref","is-referenced-by-count":78,"title":["DNN-Opt: An RL Inspired Optimization for Analog Circuit Sizing using Deep Neural Networks"],"prefix":"10.1109","author":[{"given":"Ahmet F.","family":"Budak","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Prateek","family":"Bhansali","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Bo","family":"Liu","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Nan","family":"Sun","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"David Z.","family":"Pan","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Chandramouli V.","family":"Kashyap","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref10","article-title":"Practical bayesian optimization of machine learning algorithms","author":"snoek","year":"2012","journal-title":"NIPS"},{"key":"ref11","article-title":"Multi-objective bayesian optimization for analog\/rf circuit synthesis","volume":"18","author":"lyu","year":"0","journal-title":"DAC"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18072.2020.9218757"},{"key":"ref13","article-title":"Autockt: Deep reinforcement learning of analog circuit designs","author":"settaluri","year":"2020","journal-title":"DATE"},{"key":"ref14","article-title":"Continuous control with deep reinforcement learning","author":"lillicrap","year":"2016","journal-title":"ICLRE"},{"key":"ref15","article-title":"Actor-critic algorithms","author":"konda","year":"2000","journal-title":"SIAM Journal on Control and Optimization"},{"key":"ref16","author":"sutton","year":"2018","journal-title":"Reinforcement Learning An Introduction"},{"key":"ref17","author":"turner","year":"2020","journal-title":"Bayesmark"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18072.2020.9218495"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/43.905671"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2003.810742"},{"key":"ref6","article-title":"Analog circuit sizing via swarm intelligence","author":"acar vural","year":"2012","journal-title":"AEU - International Journal of Electronics and Communications"},{"key":"ref5","article-title":"Enabling efficient analog synthesis by coupling sparse regression and polynomial optimization","author":"wang","year":"2014","journal-title":"DAC"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.7551\/mitpress\/3206.001.0001"},{"key":"ref7","author":"liu","year":"2013","journal-title":"Automated design of analog and high-frequency circuits A computational intelligence approach"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1016\/j.vlsi.2003.08.004"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1023\/A:1015098112015"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2013.2284109"}],"event":{"name":"2021 58th ACM\/IEEE Design Automation Conference (DAC)","location":"San Francisco, CA, USA","start":{"date-parts":[[2021,12,5]]},"end":{"date-parts":[[2021,12,9]]}},"container-title":["2021 58th ACM\/IEEE Design Automation Conference (DAC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9585997\/9586083\/09586139.pdf?arnumber=9586139","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,5,10]],"date-time":"2022-05-10T16:55:55Z","timestamp":1652201755000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9586139\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,12,5]]},"references-count":18,"URL":"https:\/\/doi.org\/10.1109\/dac18074.2021.9586139","relation":{},"subject":[],"published":{"date-parts":[[2021,12,5]]}}}