{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,7,4]],"date-time":"2025-07-04T21:01:19Z","timestamp":1751662879655},"reference-count":25,"publisher":"IEEE","license":[{"start":{"date-parts":[[2023,7,9]],"date-time":"2023-07-09T00:00:00Z","timestamp":1688860800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,7,9]],"date-time":"2023-07-09T00:00:00Z","timestamp":1688860800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2023,7,9]]},"DOI":"10.1109\/dac56929.2023.10247686","type":"proceedings-article","created":{"date-parts":[[2023,9,15]],"date-time":"2023-09-15T17:31:31Z","timestamp":1694799091000},"source":"Crossref","is-referenced-by-count":5,"title":["An Iterative Method for Mapping-Aware Frequency Regulation in Dataflow Circuits"],"prefix":"10.1109","author":[{"given":"Carmine","family":"Rizzi","sequence":"first","affiliation":[{"name":"ETH Zurich,Department of Information Technology and Electrical Engineering,Zurich,Switzerland"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Andrea","family":"Guerrieri","sequence":"additional","affiliation":[{"name":"School of Computer and Communication Sciences,Ecole Polytechnique F&#x00E9;d&#x00E9;rale de Lausanne (EPFL),Lausanne,Switzerland"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Lana","family":"Josipovi\u0107","sequence":"additional","affiliation":[{"name":"ETH Zurich,Department of Information Technology and Electrical Engineering,Zurich,Switzerland"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2019.8714724"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/3431920.3439289"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2013.6691122"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2007.4397291"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/2554688.2554775"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/3400302.3415657"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/3174243.3174264"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/2684746.2689063"},{"key":"ref17","first-page":"1","article-title":"Dynamatic: From C\/C++ to dynamically scheduled circuits","author":"josipovi?","year":"2020","journal-title":"Proc ACM\/SIGDA Int'l Symp Field-Programmable Gate Arrays"},{"key":"ref16","first-page":"724","article-title":"Leveraging protocol knowledge in slack matching","author":"venkataramani","year":"2006","journal-title":"Proceedings of the 25th International Conference on Computer-Aided Design"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2010.31"},{"key":"ref18","article-title":"Mapping-aware buffer placement plug-in","year":"2023"},{"key":"ref24","author":"pouchet","year":"2012","journal-title":"PolyBench The Polyhedral Benchmark Suite"},{"key":"ref23","article-title":"Gurobi Optimizer Reference Manual","year":"2022"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/IISWC.2014.6983050"},{"key":"ref20","doi-asserted-by":"crossref","first-page":"24","DOI":"10.1007\/978-3-642-14295-6_5","article-title":"ABC: An Academic Industrial-Strength Verification Tool","author":"brayton","year":"2010","journal-title":"Computer Aided Verification"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1145\/3388617"},{"key":"ref21","article-title":"ModelSim","year":"2021"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/1146909.1147025"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2013.6691121"},{"key":"ref9","author":"de micheli","year":"1994","journal-title":"Synthesis and Optimization of Digital Circuits"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/3373087.3375314"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2005.1430572"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/3530775"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/FPL57034.2022.00063"}],"event":{"name":"2023 60th ACM\/IEEE Design Automation Conference (DAC)","location":"San Francisco, CA, USA","start":{"date-parts":[[2023,7,9]]},"end":{"date-parts":[[2023,7,13]]}},"container-title":["2023 60th ACM\/IEEE Design Automation Conference (DAC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/10247654\/10247655\/10247686.pdf?arnumber=10247686","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,10,2]],"date-time":"2023-10-02T17:41:19Z","timestamp":1696268479000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10247686\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,7,9]]},"references-count":25,"URL":"https:\/\/doi.org\/10.1109\/dac56929.2023.10247686","relation":{},"subject":[],"published":{"date-parts":[[2023,7,9]]}}}