{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,23]],"date-time":"2026-03-23T15:24:28Z","timestamp":1774279468619,"version":"3.50.1"},"reference-count":42,"publisher":"IEEE","license":[{"start":{"date-parts":[[2023,7,9]],"date-time":"2023-07-09T00:00:00Z","timestamp":1688860800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,7,9]],"date-time":"2023-07-09T00:00:00Z","timestamp":1688860800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2023,7,9]]},"DOI":"10.1109\/dac56929.2023.10247734","type":"proceedings-article","created":{"date-parts":[[2023,9,15]],"date-time":"2023-09-15T13:31:31Z","timestamp":1694784691000},"page":"1-6","source":"Crossref","is-referenced-by-count":13,"title":["OpenDRC: An Efficient Open-Source Design Rule Checking Engine with Hierarchical GPU Acceleration"],"prefix":"10.1109","author":[{"given":"Zhuolun","family":"He","sequence":"first","affiliation":[{"name":"CUHK"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yihang","family":"Zuo","sequence":"additional","affiliation":[{"name":"Shanghai AI Lab"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jiaxi","family":"Jiang","sequence":"additional","affiliation":[{"name":"Shanghai AI Lab"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Haisheng","family":"Zheng","sequence":"additional","affiliation":[{"name":"Shanghai AI Lab"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yuzhe","family":"Ma","sequence":"additional","affiliation":[{"name":"HKUST(GZ)"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Bei","family":"Yu","sequence":"additional","affiliation":[{"name":"CUHK"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref13","article-title":"Exploiting parallelism in VLSI CAD","author":"marantz","year":"1986"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1145\/1365490.1365500"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/3508352.3549383"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1145\/2717764.2717782"},{"key":"ref15","first-page":"371","article-title":"A high performance SIMD framework for design rule checking on Sony&#x2019;s PlayStation 2 Emotion Engine platform [IC layout]","author":"koranne","year":"2004","journal-title":"International Symposium on Signals Circuits and Systems Proceedings SCS 2003 (Cat No 03EX720)"},{"key":"ref37","article-title":"The OpenACC Application Programming Interface","year":"2021"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1006\/jpdc.1996.0096"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/HOTCHIPS.2009.7478342"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.1985.294681"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1145\/3240765.3240766"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.1988.14748"},{"key":"ref33","first-page":"1902","article-title":"Dr. CU: Detailed routing by sparse grid graph and minimum-area-captured path search","volume":"39","author":"chen","year":"2019","journal-title":"IEEE TCAD"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/EDAC.1992.205910"},{"key":"ref32","article-title":"KLayout","year":"0"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1137\/0214019"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1980.1675628"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1155\/2000\/71046"},{"key":"ref39","article-title":"GDSII Stream Format Manual","year":"0"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.1984.1585802"},{"key":"ref38","article-title":"CUDA C++ Programming Guide","year":"0"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1145\/3380446.3430625"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS.2001.986279"},{"key":"ref24","first-page":"77","article-title":"Efficient design rule checking script generation via key information extraction","author":"zhu","year":"2022","journal-title":"Proc ML-CAD"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1117\/12.814347"},{"key":"ref26","first-page":"70","article-title":"FLUTE: Fast lookup table based rectilinear Steiner minimal tree algorithm for VLSI design","volume":"27","author":"chu","year":"2007","journal-title":"IEEE TCAD"},{"key":"ref25","first-page":"24","article-title":"ABC: An academic industrial-strength verification tool","author":"brayton","year":"2010","journal-title":"Proc CAV"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.23919\/DATE48585.2020.9116488"},{"key":"ref42","doi-asserted-by":"crossref","first-page":"105","DOI":"10.1016\/j.mejo.2016.04.006","article-title":"ASAP7: A 7-nm finFET predictive process design kit","volume":"53","author":"clark","year":"2016","journal-title":"Microelectronics Journal"},{"key":"ref41","article-title":"Efficient algorithms for enumerating intersecting intervals and rectangles","author":"mccreight","year":"1980","journal-title":"Tech Rep"},{"key":"ref22","article-title":"DRDebug: Automated Design Rule Debugging","author":"alam","year":"2022","journal-title":"IEEE TCAD"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1145\/3240765.3240843"},{"key":"ref28","first-page":"1","article-title":"Dream-place: Deep learning toolkit-enabled gpu acceleration for modern vlsi placement","author":"lin","year":"2019","journal-title":"Proc DAC"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2015.7372666"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1145\/3316781.3326334"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/2024724.2024765"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1155\/1994\/54126"},{"key":"ref9","first-page":"85","article-title":"Analysis and evaluation of parallel rectangle intersection for vlsi design rule checking","volume":"19","author":"gregoretti","year":"1987","journal-title":"Microprocessors and Microsystems"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1007\/BF00288933"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.1981.1585410"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/971697.602266"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/361002.361007"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1145\/2593069.2593133"}],"event":{"name":"2023 60th ACM\/IEEE Design Automation Conference (DAC)","location":"San Francisco, CA, USA","start":{"date-parts":[[2023,7,9]]},"end":{"date-parts":[[2023,7,13]]}},"container-title":["2023 60th ACM\/IEEE Design Automation Conference (DAC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/10247654\/10247655\/10247734.pdf?arnumber=10247734","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,10,2]],"date-time":"2023-10-02T13:41:32Z","timestamp":1696254092000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10247734\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,7,9]]},"references-count":42,"URL":"https:\/\/doi.org\/10.1109\/dac56929.2023.10247734","relation":{},"subject":[],"published":{"date-parts":[[2023,7,9]]}}}