{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,24]],"date-time":"2026-02-24T18:13:58Z","timestamp":1771956838478,"version":"3.50.1"},"reference-count":18,"publisher":"IEEE","license":[{"start":{"date-parts":[[2023,7,9]],"date-time":"2023-07-09T00:00:00Z","timestamp":1688860800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,7,9]],"date-time":"2023-07-09T00:00:00Z","timestamp":1688860800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100020487","name":"Nature","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100020487","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2023,7,9]]},"DOI":"10.1109\/dac56929.2023.10247901","type":"proceedings-article","created":{"date-parts":[[2023,9,15]],"date-time":"2023-09-15T17:31:31Z","timestamp":1694799091000},"page":"1-6","source":"Crossref","is-referenced-by-count":2,"title":["Automatic End-to-End Joint Optimization for Kernel Compilation on DSPs"],"prefix":"10.1109","author":[{"given":"Xiaolei","family":"Zhao","sequence":"first","affiliation":[{"name":"National University of Defense Technology,Changsha,China"}]},{"given":"Zhaoyun","family":"Chen","sequence":"additional","affiliation":[{"name":"National University of Defense Technology,Changsha,China"}]},{"given":"Yang","family":"Shi","sequence":"additional","affiliation":[{"name":"National University of Defense Technology,Changsha,China"}]},{"given":"Mei","family":"Wen","sequence":"additional","affiliation":[{"name":"National University of Defense Technology,Changsha,China"}]},{"given":"Chunyun","family":"Zhang","sequence":"additional","affiliation":[{"name":"National University of Defense Technology,Changsha,China"}]}],"member":"263","reference":[{"key":"ref13","article-title":"Automatic generation of fast blas3-gemm: A portable compiler approach","author":"x","year":"0","journal-title":"CGO ’2017"},{"key":"ref12","author":"garey","year":"1979","journal-title":"Computers and Intractability A Guide to the Theory of NP-Completeness"},{"key":"ref15","article-title":"The tensor algebra compiler","volume":"1","author":"k","year":"2017","journal-title":"OOPSLA"},{"key":"ref14","article-title":"Halide: a language and compiler for optimizing parallelism, locality, and recomputation in image processing pipelines","author":"r","year":"2013","journal-title":"PLDI"},{"key":"ref11","article-title":"egg: Fast and extensible equality saturation","author":"w","year":"2021","journal-title":"POPL"},{"key":"ref10","article-title":"Ceva xc4500","year":"0"},{"key":"ref2","article-title":"Vector instruction selection for digital signal processors using program synthesis","author":"a","year":"2022","journal-title":"ASPLOS"},{"key":"ref1","article-title":"Vectorization for digital signal processors via equality saturation","author":"v","year":"2021","journal-title":"ASPLOS"},{"key":"ref17","article-title":"AKG: automatic kernel generation for neural processing units using polyhedral transformations","author":"z","year":"2021","journal-title":"PLDI"},{"key":"ref16","article-title":"TVM: an automated end-to-end optimizing compiler for deep learning","author":"c","year":"2018","journal-title":"OSDI"},{"key":"ref18","article-title":"Learning to optimize tensor programs","author":"c","year":"2018","journal-title":"NeurIPS"},{"key":"ref8","article-title":"Reinforcement learning and adaptive sampling for optimized DNN compilation","author":"ahn","year":"2019","journal-title":"CoRR"},{"key":"ref7","article-title":"Ft-matrix: A coordination-aware architecture for signal processing","volume":"34","author":"c","year":"2014","journal-title":"IEEE Micro"},{"key":"ref9","article-title":"Cadence tensilica fusion g6","year":"0"},{"key":"ref4","article-title":"A practical tile size selection model for affine loop nests","author":"n","year":"2021","journal-title":"ICS"},{"key":"ref3","article-title":"A synthesis-aided compiler for DSP architectures (wip paper)","author":"v","year":"2020","journal-title":"LCTES"},{"key":"ref6","article-title":"Exploring ILP for VLIW architecture by quantified modeling and dynamic programming-based instruction scheduling","author":"d","year":"2022","journal-title":"ASP-DAC"},{"key":"ref5","article-title":"Automatic SIMD vectorization of fast fourier transforms for the larrabee and AVX instruction sets","author":"m","year":"2011","journal-title":"ICS"}],"event":{"name":"2023 60th ACM\/IEEE Design Automation Conference (DAC)","location":"San Francisco, CA, USA","start":{"date-parts":[[2023,7,9]]},"end":{"date-parts":[[2023,7,13]]}},"container-title":["2023 60th ACM\/IEEE Design Automation Conference (DAC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/10247654\/10247655\/10247901.pdf?arnumber=10247901","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,10,2]],"date-time":"2023-10-02T17:41:17Z","timestamp":1696268477000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10247901\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,7,9]]},"references-count":18,"URL":"https:\/\/doi.org\/10.1109\/dac56929.2023.10247901","relation":{},"subject":[],"published":{"date-parts":[[2023,7,9]]}}}