{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,2]],"date-time":"2025-09-02T00:04:02Z","timestamp":1756771442646,"version":"3.44.0"},"reference-count":11,"publisher":"IEEE","license":[{"start":{"date-parts":[[2019,10,1]],"date-time":"2019-10-01T00:00:00Z","timestamp":1569888000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,10,1]],"date-time":"2019-10-01T00:00:00Z","timestamp":1569888000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2019,10]]},"DOI":"10.1109\/dasip48288.2019.9049177","type":"proceedings-article","created":{"date-parts":[[2020,3,31]],"date-time":"2020-03-31T00:44:39Z","timestamp":1585615479000},"page":"29-34","source":"Crossref","is-referenced-by-count":1,"title":["Mapping and Frequency Joint Optimization for Energy Efficient Execution of Multiple Applications on Multicore Systems"],"prefix":"10.1109","author":[{"given":"Simei","family":"Yang","sequence":"first","affiliation":[{"name":"University of Nantes, CNRS, IETR, UMR,F-44000 Nantes,France,6164"}]},{"given":"S\u00e9bastien","family":"lez Nours","sequence":"additional","affiliation":[{"name":"University of Nantes, CNRS, IETR, UMR,F-44000 Nantes,France,6164"}]},{"given":"Maria mendez","family":"Real","sequence":"additional","affiliation":[{"name":"University of Nantes, CNRS, IETR, UMR,F-44000 Nantes,France,6164"}]},{"given":"S\u00e9bastien","family":"Pillement","sequence":"additional","affiliation":[{"name":"University of Nantes, CNRS, IETR, UMR,F-44000 Nantes,France,6164"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ISSS.2002.1227162"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2016.2595560"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1007\/s11265-015-1059-4"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/2038698.2038726"},{"journal-title":"Sdf3","year":"0","key":"ref11"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1016\/j.sysarc.2017.01.002"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1987.5009446"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2015.2446938"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/3057267"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/2680542"},{"key":"ref1","first-page":"1","article-title":"An introduction to multicore system on chip. trends and challenges","author":"lionel","year":"2010","journal-title":"Multiprocessor System-on-Chip Hardware Design and Tool Integration"}],"event":{"name":"2019 Conference on Design and Architectures for Signal and Image Processing (DASIP)","start":{"date-parts":[[2019,10,16]]},"location":"Montreal, QC, Canada","end":{"date-parts":[[2019,10,18]]}},"container-title":["2019 Conference on Design and Architectures for Signal and Image Processing (DASIP)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9035666\/9049168\/09049177.pdf?arnumber=9049177","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,9,1]],"date-time":"2025-09-01T19:26:54Z","timestamp":1756754814000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9049177\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,10]]},"references-count":11,"URL":"https:\/\/doi.org\/10.1109\/dasip48288.2019.9049177","relation":{},"subject":[],"published":{"date-parts":[[2019,10]]}}}