{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,29]],"date-time":"2025-09-29T11:58:52Z","timestamp":1759147132043},"reference-count":15,"publisher":"IEEE Comput. Soc","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/date.2003.1253632","type":"proceedings-article","created":{"date-parts":[[2003,12,22]],"date-time":"2003-12-22T12:34:10Z","timestamp":1072096450000},"page":"344-349","source":"Crossref","is-referenced-by-count":36,"title":["Packetized on-chip interconnect communication analysis for MPSoC"],"prefix":"10.1109","author":[{"given":"T.T.","family":"Ye","sequence":"first","affiliation":[]},{"given":"L.","family":"Benini","sequence":"additional","affiliation":[]},{"given":"G.","family":"De Micheli","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"15","article-title":"Energy estimation and optimization of embedded vliw processors based on instruction clustering","author":"vittorio","year":"0","journal-title":"Proceeding of 22nd DAC"},{"key":"13","article-title":"Memory system energy: Influence of hardware-software optimizations","author":"geethanjali","year":"2000","journal-title":"Int?l Sym on Low Power Design and Electronics"},{"doi-asserted-by":"publisher","key":"14","DOI":"10.1145\/309847.309902"},{"year":"1998","author":"patterson","journal-title":"Computer Organization and Design The Hardware\/Software Interface","key":"11"},{"doi-asserted-by":"publisher","key":"12","DOI":"10.1145\/514049.514051"},{"key":"3","article-title":"Networks on chips: A new paradigm for system on chip design","author":"luca","year":"0","journal-title":"Proceedings of DATE 2002 Conference"},{"doi-asserted-by":"publisher","key":"2","DOI":"10.1109\/ISVLSI.2002.1016885"},{"key":"1","article-title":"Route packets, not wires: On-chip interconnection networks","author":"william","year":"2001","journal-title":"38th Design Automation Conference"},{"key":"10","article-title":"Interconnection Networks, an Engineering Approach","author":"duato","year":"1997","journal-title":"IEEE Computer Society Press"},{"doi-asserted-by":"publisher","key":"7","DOI":"10.1109\/ICCD.1997.628902"},{"doi-asserted-by":"publisher","key":"6","DOI":"10.1109\/43.924826"},{"doi-asserted-by":"publisher","key":"5","DOI":"10.1109\/2.982915"},{"key":"4","first-page":"1998","author":"culler","year":"0","journal-title":"Parallel Computer Architecture A Hardware\/Software Approach"},{"year":"1980","author":"thompson","journal-title":"A Complexity Theory for VLSI","key":"9"},{"doi-asserted-by":"publisher","key":"8","DOI":"10.1109\/ASIC.2000.880753"}],"event":{"acronym":"DATE-03","name":"6th Design Automation and Test in Europe (DATE 03)","location":"Munich, Germany"},"container-title":["2003 Design, Automation and Test in Europe Conference and Exhibition"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8443\/26600\/01253632.pdf?arnumber=1253632","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,13]],"date-time":"2017-03-13T20:38:08Z","timestamp":1489437488000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1253632\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":15,"URL":"https:\/\/doi.org\/10.1109\/date.2003.1253632","relation":{},"subject":[]}}