{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,24]],"date-time":"2024-10-24T04:23:46Z","timestamp":1729743826616,"version":"3.28.0"},"reference-count":10,"publisher":"IEEE","license":[{"start":{"date-parts":[[2004,1,1]],"date-time":"2004-01-01T00:00:00Z","timestamp":1072915200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2004,1,1]],"date-time":"2004-01-01T00:00:00Z","timestamp":1072915200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2004]]},"DOI":"10.1109\/date.2004.1268847","type":"proceedings-article","created":{"date-parts":[[2004,6,21]],"date-time":"2004-06-21T21:52:40Z","timestamp":1087854760000},"page":"188-193 Vol.1","source":"Crossref","is-referenced-by-count":5,"title":["Automatic generation of validation stimuli for application-specific processors"],"prefix":"10.1109","author":[{"given":"O.","family":"Goloubeva","sequence":"first","affiliation":[{"name":"Politecnico di Torino, Italy"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"M.","family":"Sonza Reorda","sequence":"additional","affiliation":[{"name":"Politecnico di Torino, Italy"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"M.","family":"Violante","sequence":"additional","affiliation":[{"name":"Politecnico di Torino, Italy"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.1999.781307"},{"key":"2","doi-asserted-by":"crossref","first-page":"128","DOI":"10.1007\/3-540-45645-7_7","article-title":"Verifying a simple pipelined microprocessor using maude","volume":"2267","author":"harman","year":"2001","journal-title":"Lecture Notes in Computer Science"},{"journal-title":"Opencores Wishbone System-on-chip (Soc) Interconnection Architecture for Portable Ip Cores","year":"2002","key":"1"},{"year":"0","key":"10"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/HLDVT.2003.1252488"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2003.1253736"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2001.915026"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1145\/337292.337331"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/FTCS.1998.689467"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/12.980008"}],"event":{"name":"Proceedings. Design, Automation and Test in Europe Conference and Exhibition","start":{"date-parts":[[2004,2,16]]},"location":"Paris, France","end":{"date-parts":[[2004,2,20]]}},"container-title":["Proceedings Design, Automation and Test in Europe Conference and Exhibition"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8959\/28390\/01268847.pdf?arnumber=1268847","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T17:46:25Z","timestamp":1729705585000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/1268847\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2004]]},"references-count":10,"URL":"https:\/\/doi.org\/10.1109\/date.2004.1268847","relation":{},"subject":[],"published":{"date-parts":[[2004]]}}}