{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,7]],"date-time":"2024-09-07T10:58:17Z","timestamp":1725706697059},"reference-count":8,"publisher":"IEEE Comput. Soc","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/date.2004.1268903","type":"proceedings-article","created":{"date-parts":[[2004,6,21]],"date-time":"2004-06-21T21:52:40Z","timestamp":1087854760000},"page":"552-557","source":"Crossref","is-referenced-by-count":20,"title":["A new optimized implementation of the SystemC engine using acyclic scheduling"],"prefix":"10.1109","author":[{"given":"D.G.","family":"Perez","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"G.","family":"Mouchard","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"O.","family":"Temam","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/EURMIC.1998.711775"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-68402-9_37"},{"key":"ref6","doi-asserted-by":"crossref","DOI":"10.1145\/775832.776065","article-title":"Optimizations for a simulator construction system supporting reusable components","author":"penry","year":"2003","journal-title":"Proceedings of the 40th Design Automation Conference"},{"first-page":"2000","article-title":"SystemC","year":"0","key":"ref5"},{"key":"ref8","article-title":"Microarchitectural exploration with liberty","author":"vachharajani","year":"2001","journal-title":"34th International Symposium on Microarchitecture"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1137\/0201010"},{"article-title":"The specification and execution of heterogeneous synchronous reactive systems","year":"1997","author":"edwards","key":"ref2"},{"key":"ref1","article-title":"SystemC performance evaluation using a pipelined DLX multiprocessor","author":"charest","year":"2002","journal-title":"DATE 02"}],"event":{"name":". Design, Automation and Test in Europe Conference and Exhibition","acronym":"DATE-04","location":"Paris, France"},"container-title":["Proceedings Design, Automation and Test in Europe Conference and Exhibition"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8959\/28390\/01268903.pdf?arnumber=1268903","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,6,23]],"date-time":"2021-06-23T15:35:56Z","timestamp":1624462556000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1268903\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":8,"URL":"https:\/\/doi.org\/10.1109\/date.2004.1268903","relation":{},"subject":[]}}