{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,26]],"date-time":"2025-11-26T16:06:54Z","timestamp":1764173214414},"reference-count":10,"publisher":"IEEE Comput. Soc","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/date.2004.1268908","type":"proceedings-article","created":{"date-parts":[[2004,6,21]],"date-time":"2004-06-21T17:52:40Z","timestamp":1087840360000},"page":"584-589","source":"Crossref","is-referenced-by-count":61,"title":["Evaluating the effects of SEUs affecting the configuration memory of an SRAM-based FPGA"],"prefix":"10.1109","author":[{"given":"M.","family":"Bellato","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"P.","family":"Bernardi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"D.","family":"Bortolato","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"A.","family":"Candelori","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"M.","family":"Ceschia","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"A.","family":"Paccagnella","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"M.","family":"Rebaudengo","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"M.S.","family":"Reorda","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"M.","family":"Violante","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"P.","family":"Zambolin","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"doi-asserted-by":"publisher","key":"3","DOI":"10.1109\/REDW.2002.1045531"},{"doi-asserted-by":"publisher","key":"2","DOI":"10.1109\/VTEST.1999.766651"},{"doi-asserted-by":"publisher","key":"1","DOI":"10.1109\/92.766746"},{"doi-asserted-by":"publisher","key":"10","DOI":"10.1109\/23.819146"},{"doi-asserted-by":"publisher","key":"7","DOI":"10.1109\/23.489228"},{"doi-asserted-by":"publisher","key":"6","DOI":"10.1109\/23.124140"},{"doi-asserted-by":"publisher","key":"5","DOI":"10.1109\/43.35545"},{"doi-asserted-by":"publisher","key":"4","DOI":"10.1109\/23.658966"},{"key":"9","doi-asserted-by":"crossref","first-page":"119","DOI":"10.1109\/OLT.2003.1214377","article-title":"Analyzing seu effects in sram-based fpgas","author":"violante","year":"2003","journal-title":"IEEE On-Line Testing Symposium"},{"doi-asserted-by":"publisher","key":"8","DOI":"10.1109\/23.903816"}],"event":{"acronym":"DATE-04","name":". Design, Automation and Test in Europe Conference and Exhibition","location":"Paris, France"},"container-title":["Proceedings Design, Automation and Test in Europe Conference and Exhibition"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8959\/28390\/01268908.pdf?arnumber=1268908","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2018,6,3]],"date-time":"2018-06-03T08:39:25Z","timestamp":1528015165000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1268908\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":10,"URL":"https:\/\/doi.org\/10.1109\/date.2004.1268908","relation":{},"subject":[]}}