{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T10:01:16Z","timestamp":1729677676922,"version":"3.28.0"},"reference-count":11,"publisher":"IEEE Comput. Soc","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/date.2004.1268995","type":"proceedings-article","created":{"date-parts":[[2004,7,20]],"date-time":"2004-07-20T10:08:28Z","timestamp":1090318108000},"page":"864-869","source":"Crossref","is-referenced-by-count":6,"title":["Power aware interface synthesis for bus-based SoC designs"],"prefix":"10.1109","author":[{"given":"N.D.","family":"Liveris","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"P.","family":"Banerjee","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"3","doi-asserted-by":"crossref","first-page":"1062","DOI":"10.1109\/ACSSC.1998.751425","article-title":"An alternative architecture for on-chip global interconnect: Segmented bus power modeling","author":"zhang","year":"1998","journal-title":"Conf Rec Thirty-Second Asilomar Conf Signals Syst Comput"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/ISSS.1998.730611"},{"journal-title":"Co-Synthesis of Hardware and Software for Digital Embedded Systems","year":"0","author":"gupta","key":"10"},{"journal-title":"AMBA Specification (rev2 0) Multi-layer AHB Overview Arm","year":"0","key":"1"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/92.736127"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/92.365453"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.1999.780021"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4757-2849-1"},{"key":"9","first-page":"263","article-title":"MOCSYN: Multiobjective Core-Based Single-Chip System Syn thesis","volume":"99","author":"dick","year":"0","journal-title":"DATE"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/43.992764"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.1995.480159"}],"event":{"name":"Design, Automation and Test in Europe Conference and Exhibition","acronym":"DATE-04","location":"Paris, France"},"container-title":["Proceedings Design, Automation and Test in Europe Conference and Exhibition"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8959\/28391\/01268995.pdf?arnumber=1268995","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,16]],"date-time":"2017-06-16T04:53:21Z","timestamp":1497588801000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1268995\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":11,"URL":"https:\/\/doi.org\/10.1109\/date.2004.1268995","relation":{},"subject":[]}}