{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,7]],"date-time":"2025-06-07T04:47:57Z","timestamp":1749271677354},"reference-count":15,"publisher":"IEEE Comput. Soc","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/date.2004.1269069","type":"proceedings-article","created":{"date-parts":[[2004,7,20]],"date-time":"2004-07-20T14:08:28Z","timestamp":1090332508000},"page":"1264-1269","source":"Crossref","is-referenced-by-count":47,"title":["Cache-aware scratchpad allocation algorithm"],"prefix":"10.1109","author":[{"given":"M.","family":"Verma","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"L.","family":"Wehmeyer","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"P.","family":"Marwedel","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"15","doi-asserted-by":"publisher","DOI":"10.1109\/4.509850"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2002.998306"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/EDTC.1996.494132"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4615-5107-2"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1109\/L-CA.2002.4"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/CODES.2002.1003604"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1145\/581888.581891"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1145\/93542.93550"},{"journal-title":"ARM Advanced RISC Machines Ltd","year":"0","key":"1"},{"key":"7","first-page":"143","article-title":"Analytical energy dissipation models for low power caches","author":"kamble","year":"1997","journal-title":"Proceedings of 1997 International Symposium on Low Power Electronics and Design LPE"},{"journal-title":"Computers and Intractability A Guide to the Theory of NP-Completeness","year":"1979","author":"garey","key":"6"},{"journal-title":"CPLEX CPLEX Limited","year":"0","key":"5"},{"key":"4","article-title":"Architectural and compiler support for energy reduction in the memory hierarchy of high performance microprocessors","author":"bellas","year":"1998","journal-title":"Proc of the ISLPED Monterey"},{"journal-title":"Motorola Motorola ColdFire MCF5XXX Processor Family","year":"0","key":"9"},{"journal-title":"MEMSIM Dept of Computer Science XII Univ of Dortmund","year":"0","key":"8"}],"event":{"name":"Design, Automation and Test in Europe Conference and Exhibition","acronym":"DATE-04","location":"Paris, France"},"container-title":["Proceedings Design, Automation and Test in Europe Conference and Exhibition"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8959\/28391\/01269069.pdf?arnumber=1269069","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,13]],"date-time":"2017-03-13T16:46:41Z","timestamp":1489423601000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1269069\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":15,"URL":"https:\/\/doi.org\/10.1109\/date.2004.1269069","relation":{},"subject":[]}}