{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,8,24]],"date-time":"2025-08-24T01:50:02Z","timestamp":1756000202438},"reference-count":18,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2008,3]]},"DOI":"10.1109\/date.2008.4484811","type":"proceedings-article","created":{"date-parts":[[2008,4,15]],"date-time":"2008-04-15T22:15:51Z","timestamp":1208297751000},"page":"997-1002","source":"Crossref","is-referenced-by-count":6,"title":["Comparison of memory write policies for NoC based Multicore Cache Coherent Systems"],"prefix":"10.1109","author":[{"given":"Pierre Guironnet","family":"de Massas","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Frederic","family":"Petrot","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"17","doi-asserted-by":"crossref","first-page":"24","DOI":"10.1109\/ISCA.1995.524546","article-title":"The SPLASH-2 programs: characterization and methodological considerations","author":"woo","year":"1995","journal-title":"Proceedings 22nd Annual International Symposium on Computer Architecture ISCA"},{"key":"18","doi-asserted-by":"publisher","DOI":"10.1109\/12.30868"},{"key":"15","doi-asserted-by":"publisher","DOI":"10.1109\/2.55497"},{"key":"16","doi-asserted-by":"publisher","DOI":"10.1109\/MM.1994.363067"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1145\/285930.285987"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2003.1253805"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1145\/1151074.1151081"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1145\/859618.859640"},{"year":"0","key":"3"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.1988.5238"},{"year":"0","key":"1"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1145\/1250662.1250707"},{"key":"7","article-title":"in-network cache coherence","author":"eisley","year":"2006","journal-title":"MICRO 39 Proceedings of the 39th Annual IEEE\/ACM International Symposium on Microarchitecture"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1145\/378239.379048"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1978.1675013"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1145\/6513.6514"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1145\/339647.339669"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1145\/1024393.1024406"}],"event":{"name":"2008 Design, Automation and Test in Europe","start":{"date-parts":[[2008,3,10]]},"location":"Munich, Germany","end":{"date-parts":[[2008,3,14]]}},"container-title":["2008 Design, Automation and Test in Europe"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4475437\/4484624\/04484811.pdf?arnumber=4484811","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,2,25]],"date-time":"2024-02-25T04:12:32Z","timestamp":1708834352000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/4484811\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2008,3]]},"references-count":18,"URL":"https:\/\/doi.org\/10.1109\/date.2008.4484811","relation":{},"subject":[],"published":{"date-parts":[[2008,3]]}}}