{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T20:29:36Z","timestamp":1725654576270},"reference-count":10,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2008,3]]},"DOI":"10.1109\/date.2008.4484913","type":"proceedings-article","created":{"date-parts":[[2008,4,15]],"date-time":"2008-04-15T18:15:51Z","timestamp":1208283351000},"page":"792-795","source":"Crossref","is-referenced-by-count":0,"title":["Zero-Efficient Buffer Design for Reliable Network-on-Chip in Tiled Chip-Multi-Processor"],"prefix":"10.1109","author":[{"given":"Jun","family":"Wang","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hongbo","family":"Zeng","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Kun","family":"Huang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ge","family":"Zhang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yan","family":"Tang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"3","doi-asserted-by":"publisher","DOI":"10.1145\/378239.379048"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2005.64"},{"key":"10","doi-asserted-by":"crossref","first-page":"24","DOI":"10.1109\/ISCA.1995.524546","article-title":"The SPLASH-2 programs: characterization and methodological considerations","author":"woo","year":"1995","journal-title":"Proceedings 22nd Annual International Symposium on Computer Architecture ISCA"},{"year":"0","key":"1"},{"key":"7","doi-asserted-by":"crossref","first-page":"69","DOI":"10.1145\/1084834.1084856","article-title":"key research problems in noc design: a holistic perspective","author":"ogras","year":"2005","journal-title":"Proc IEEE\/ACM\/IFIP Int Conf Hardware\/Software Codesign Syst Synthesis"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1007\/s11390-005-0243-6"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2006.882474"},{"key":"4","article-title":"implementation and evaluation of on-chip network architectures","author":"gratz","year":"2006","journal-title":"International Conference on Computer Design (ICCD)"},{"key":"9","article-title":"power-driven design of router microarchitectures in on-chip networks","author":"wang","year":"2003","journal-title":"Micro"},{"year":"0","key":"8"}],"event":{"name":"2008 Design, Automation and Test in Europe","start":{"date-parts":[[2008,3,10]]},"location":"Munich, Germany","end":{"date-parts":[[2008,3,14]]}},"container-title":["2008 Design, Automation and Test in Europe"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4475437\/4484624\/04484913.pdf?arnumber=4484913","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,5,17]],"date-time":"2023-05-17T15:32:50Z","timestamp":1684337570000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/4484913\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2008,3]]},"references-count":10,"URL":"https:\/\/doi.org\/10.1109\/date.2008.4484913","relation":{},"subject":[],"published":{"date-parts":[[2008,3]]}}}