{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,22]],"date-time":"2024-10-22T23:36:32Z","timestamp":1729640192366,"version":"3.28.0"},"reference-count":12,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2009,4]]},"DOI":"10.1109\/date.2009.5090843","type":"proceedings-article","created":{"date-parts":[[2013,2,19]],"date-time":"2013-02-19T18:16:39Z","timestamp":1361297799000},"page":"1190-1195","source":"Crossref","is-referenced-by-count":1,"title":["An efficient decoupling capacitance optimization using piecewise polynomial models"],"prefix":"10.1109","author":[{"family":"Xiaoyi Wang","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Yici Cai","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"S.X.-D.","family":"Tan","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Xianlong Hong","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"J.","family":"Relles","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"3","doi-asserted-by":"crossref","DOI":"10.1109\/DAC.1997.597223","article-title":"power supply noise analysis methodology for deep-submicron vlsi chip design","author":"chen","year":"1997","journal-title":"Proc Design Automation Conf (DAC)"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2006.882207"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.2003.1218843"},{"journal-title":"Circuits Interconnections and Packaging for VLSI","year":"1990","author":"bakoglu","key":"1"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.2006.229194"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2006.870862"},{"key":"5","doi-asserted-by":"crossref","DOI":"10.1109\/ASPDAC.2007.358079","article-title":"fast decoupling capacitor budgeting for power\/ground network using random walk approach","author":"kang","year":"2007","journal-title":"ASP-DAC '07 Proceedings of the 2007 conference on Asia South Pacific design automation"},{"key":"4","first-page":"3273","article-title":"a fast decoupling capacitor budgeting algorithm for robust on-chip power delivery","volume":"e87 a","author":"fu","year":"2004","journal-title":"IEICE Trans Fundament Electron Commun Comput Sci"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1145\/505388.505405"},{"key":"8","doi-asserted-by":"crossref","first-page":"428","DOI":"10.1109\/TCAD.2003.809658","article-title":"optimal decoupling capacitor sizing and placement for standard cell layout designs","volume":"22","author":"su","year":"2003","journal-title":"IEEE Trans on Computer-Aided Design of Integrated Circuits and Systems"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/43.974140"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.2006.229204"}],"event":{"name":"2009 Design, Automation & Test in Europe Conference & Exhibition (DATE'09)","start":{"date-parts":[[2009,4,20]]},"location":"Nice","end":{"date-parts":[[2009,4,24]]}},"container-title":["2009 Design, Automation & Test in Europe Conference & Exhibition"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4926138\/5090609\/05090843.pdf?arnumber=5090843","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,21]],"date-time":"2017-06-21T07:48:04Z","timestamp":1498031284000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5090843\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2009,4]]},"references-count":12,"URL":"https:\/\/doi.org\/10.1109\/date.2009.5090843","relation":{},"subject":[],"published":{"date-parts":[[2009,4]]}}}