{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T06:50:12Z","timestamp":1729666212988,"version":"3.28.0"},"reference-count":30,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2009,4]]},"DOI":"10.1109\/date.2009.5090884","type":"proceedings-article","created":{"date-parts":[[2013,2,19]],"date-time":"2013-02-19T13:16:39Z","timestamp":1361279799000},"page":"1404-1409","source":"Crossref","is-referenced-by-count":9,"title":["Effectiveness of adaptive supply voltage and body bias as post-silicon variability compensation techniques for full-swing and low-swing on-chip communication channels"],"prefix":"10.1109","author":[{"given":"G.","family":"Paci","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"D.","family":"Bertozzi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"L.","family":"Benini","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"19","first-page":"2861","article-title":"0.6pj\/b 3gb\/s\/ch transceiver in 0.18 um cmos for 10mm on-chip interconnects","author":"bae","year":"2008","journal-title":"ISCAS 2008"},{"key":"17","doi-asserted-by":"publisher","DOI":"10.1109\/SOCC.2006.283900"},{"key":"18","doi-asserted-by":"publisher","DOI":"10.1109\/NEWCAS.2007.4487974"},{"key":"15","doi-asserted-by":"publisher","DOI":"10.1109\/92.845893"},{"key":"16","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.847517"},{"key":"13","first-page":"284","article-title":"adaptive supply voltage technique for low swing interconnects","author":"jeong","year":"2004","journal-title":"ASP-DAC 2004"},{"year":"0","key":"14"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/VLSID.2006.16"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2004.834241"},{"key":"21","first-page":"1396","article-title":"adaptive body bias for reducing impacts of die-to-die and within-die parameter variations on microprocessor frequency and leakage","volume":"37","author":"tschanz","year":"2002","journal-title":"IEEE Journal of SSC"},{"key":"20","doi-asserted-by":"crossref","first-page":"14","DOI":"10.1145\/1013235.1013245","article-title":"Technology Exploration for Adaptive Power and Frequency Scaling in 90nm CMOS","author":"meijer","year":"2004","journal-title":"Proceedings of the 2004 International Symposium on Low Power Electronics and Design LPE"},{"key":"22","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2003.810053"},{"key":"23","first-page":"967","article-title":"process variation tolerant pipeline design through a placement-aware multiple voltage island design style","author":"bonesi","year":"2008","journal-title":"DATE 2008"},{"key":"24","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2003.817120"},{"key":"25","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2004.1283715"},{"year":"0","key":"26"},{"key":"27","first-page":"307","article-title":"parametric timing and power macromodels for high level simulation of low-swing interconnects","author":"bertozzi","year":"2002","journal-title":"ISLPED"},{"key":"28","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2007.4405844"},{"key":"29","article-title":"impact of parameter variations on multi-core chips","author":"humenay","year":"2006","journal-title":"Int Workshop on Architectural Support for Gigascale Integration"},{"year":"0","key":"3"},{"year":"0","key":"2"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2005.863753"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1145\/299996.300073"},{"key":"30","doi-asserted-by":"publisher","DOI":"10.1109\/VTSA.1995.524654"},{"year":"0","key":"7"},{"year":"0","key":"6"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1145\/1353610.1353620"},{"year":"0","key":"4"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2007.893661"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/ECCTD.2007.4529716"}],"event":{"name":"2009 Design, Automation & Test in Europe Conference & Exhibition (DATE'09)","start":{"date-parts":[[2009,4,20]]},"location":"Nice","end":{"date-parts":[[2009,4,24]]}},"container-title":["2009 Design, Automation &amp; Test in Europe Conference &amp; Exhibition"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4926138\/5090609\/05090884.pdf?arnumber=5090884","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,2,8]],"date-time":"2022-02-08T19:01:49Z","timestamp":1644346909000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5090884\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2009,4]]},"references-count":30,"URL":"https:\/\/doi.org\/10.1109\/date.2009.5090884","relation":{},"subject":[],"published":{"date-parts":[[2009,4]]}}}