{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,6]],"date-time":"2026-04-06T05:51:15Z","timestamp":1775454675264,"version":"3.50.1"},"reference-count":16,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,3]]},"DOI":"10.1109\/date.2010.5456949","type":"proceedings-article","created":{"date-parts":[[2013,2,19]],"date-time":"2013-02-19T13:16:33Z","timestamp":1361279793000},"page":"771-776","source":"Crossref","is-referenced-by-count":18,"title":["Large-scale Boolean matching"],"prefix":"10.1109","author":[{"given":"Hadi","family":"Katebi","sequence":"first","affiliation":[]},{"given":"Igor L","family":"Markov","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","article-title":"Xilinx ISE Handles Incremental Changes","author":"goering","year":"2007","journal-title":"EETimes"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/1687399.1687546"},{"key":"ref12","first-page":"227","article-title":"Scalable exploration of functional dependency by interpolation and incremental SAT solving","author":"lee","year":"0","journal-title":"Proc of ICCAD '07"},{"key":"ref13","first-page":"836","article-title":"Improvements to Combinational Equivalence Checking","author":"mishchenko","year":"0","journal-title":"Proc DAC'06"},{"key":"ref14","article-title":"FRAIGS: A Unifying Representation for Logic Synthesis and Verification","author":"mishchenko","year":"2005","journal-title":"Tech Rep EECS Dept UC Berkeley"},{"key":"ref15","first-page":"37","article-title":"Incremental Sequential Equivalence Checking and Subgraph Isomorphism","author":"ray","year":"0","journal-title":"IWLS'09"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/1629911.1630016"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/264995.264996"},{"key":"ref3","first-page":"841","article-title":"A Unified Approach to Canonical Form-based Boolean Matching","author":"agosta","year":"0","journal-title":"Proc DAC'07"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2006.243959"},{"key":"ref5","year":"0","journal-title":"ABC A System for Sequential Synthesis and Verification Release 70930"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/368273.368557"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/321033.321034"},{"key":"ref2","first-page":"379","article-title":"A New Canonical Form for Fast Boolean Matching in Logic Synthesis and Verification","author":"abdollahi","year":"0","journal-title":"Proc DAC'05"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/1391469.1391635"},{"key":"ref9","first-page":"502","article-title":"An Extensible SAT-solver","author":"e\u00e9n","year":"0","journal-title":"SAT '03"}],"event":{"name":"2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010)","location":"Dresden","start":{"date-parts":[[2010,3,8]]},"end":{"date-parts":[[2010,3,12]]}},"container-title":["2010 Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE 2010)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5450668\/5456897\/05456949.pdf?arnumber=5456949","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,18]],"date-time":"2017-03-18T15:28:55Z","timestamp":1489850935000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5456949\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,3]]},"references-count":16,"URL":"https:\/\/doi.org\/10.1109\/date.2010.5456949","relation":{},"subject":[],"published":{"date-parts":[[2010,3]]}}}