{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,22]],"date-time":"2024-10-22T15:43:16Z","timestamp":1729611796490,"version":"3.28.0"},"reference-count":26,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,3]]},"DOI":"10.1109\/date.2010.5457001","type":"proceedings-article","created":{"date-parts":[[2013,2,19]],"date-time":"2013-02-19T13:16:33Z","timestamp":1361279793000},"page":"1267-1272","source":"Crossref","is-referenced-by-count":4,"title":["Coordinated resource optimization in behavioral synthesis"],"prefix":"10.1109","author":[{"given":"Jason","family":"Cong","sequence":"first","affiliation":[]},{"family":"Bin Liu","sequence":"additional","affiliation":[]},{"family":"Junjuan Xu","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2006.870409"},{"key":"ref11","first-page":"536","article-title":"Splicer: a heuristic approach to connectivity binding","author":"pangre","year":"1988","journal-title":"Proc Design Automation Conf"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/123186.123350"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2004.1337542"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2008.4484821"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1016\/S0026-2692(02)00048-4"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2006.320017"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/43.240074"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/92.555988"},{"key":"ref19","doi-asserted-by":"crossref","first-page":"68","DOI":"10.1145\/74382.74395","article-title":"integrated scheduling and binding : a synthesis approach for design space exploration","author":"balakrishnan","year":"1989","journal-title":"26th ACM\/IEEE Design Automation Conference"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/43.31522"},{"journal-title":"Synthesis and Optimization of Digital Circuits","year":"1994","author":"micheli","key":"ref3"},{"key":"ref6","first-page":"433","article-title":"An efficient and versatile scheduling algorithm based on SDC formulation","volume":"2006","author":"cong","year":"0","journal-title":"Proc Design Automation Conf"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/785411.785416"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.1986.1586099"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/12.910815"},{"journal-title":"High-Level Synthesis Introduction to Chip and System Design","year":"1992","author":"gajski","key":"ref2"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1016\/0167-9260(91)90025-G"},{"article-title":"Comparison of high level design methodologies for algorithmic IPs: Bluespec and C-based synthesis","year":"2009","author":"agarwal","key":"ref1"},{"key":"ref20","doi-asserted-by":"crossref","first-page":"550","DOI":"10.1109\/TCAD.2004.825872","article-title":"Architecture and synthesis for on-chip multicycle communication","volume":"23","author":"cong","year":"2004","journal-title":"IEEE Trans on Computer-Aided Design of Integrated Circuits and Systems"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1145\/1687399.1687410"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.1992.227854"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1016\/j.ipl.2006.01.008"},{"key":"ref23","first-page":"22","article-title":"Scheduling with integer delay budgeting for low-power optimization","author":"jiang","year":"2008","journal-title":"Proc Asia and South Pacific Design Automation Conf"},{"year":"0","key":"ref26"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/SOCC.2006.283880"}],"event":{"name":"2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010)","start":{"date-parts":[[2010,3,8]]},"location":"Dresden","end":{"date-parts":[[2010,3,12]]}},"container-title":["2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5450668\/5456897\/05457001.pdf?arnumber=5457001","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,21]],"date-time":"2017-06-21T03:48:23Z","timestamp":1498016903000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5457001\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,3]]},"references-count":26,"URL":"https:\/\/doi.org\/10.1109\/date.2010.5457001","relation":{},"subject":[],"published":{"date-parts":[[2010,3]]}}}