{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T05:25:23Z","timestamp":1729661123554,"version":"3.28.0"},"reference-count":20,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,3]]},"DOI":"10.1109\/date.2010.5457011","type":"proceedings-article","created":{"date-parts":[[2013,2,19]],"date-time":"2013-02-19T13:16:33Z","timestamp":1361279793000},"page":"1317-1320","source":"Crossref","is-referenced-by-count":0,"title":["Path-based scheduling in a hardware compiler"],"prefix":"10.1109","author":[{"family":"Ruirui Gu","sequence":"first","affiliation":[]},{"given":"Alessandro","family":"Forin","sequence":"additional","affiliation":[]},{"given":"Neil","family":"Pittman","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"year":"0","key":"ref10","article-title":"CriticalBlue"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/PROC.1987.13876"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/RSP.2008.32"},{"key":"ref13","article-title":"CAL language report, language version 1.0 - document edition 1","author":"eker","year":"2003","journal-title":"Electronics Research Laboratory University of California at Berkeley Tech Rep UCB\/ERL M03\/48"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2007.904095"},{"year":"0","key":"ref15","article-title":"Microsoft Giano"},{"key":"ref16","article-title":"Automatic Generation of Interrupt-Aware Hardware Accelerators with the M2V Compiler","author":"sekar","year":"2008","journal-title":"Microsoft Research Tech Rep MSR-TR"},{"key":"ref17","article-title":"eMIPS, A Dynamically Extensible Processor","author":"forin","year":"2006","journal-title":"Microsoft Research Technical Report MSR-TR-2006&#x2013;143"},{"key":"ref18","article-title":"M2V - Automatic Hardware Generation From Software Binaries","author":"gu","year":"2009","journal-title":"Microsoft Research Technical Report MSR-TR-2009-106"},{"key":"ref19","article-title":"MIPS-to-Verilog, Hardware Compilation for the eMIPS Processor","author":"meier","year":"2008","journal-title":"16th Symposium on Field-Programmable Custom Computing Machines"},{"key":"ref4","doi-asserted-by":"crossref","DOI":"10.1023\/A:1015341305426","article-title":"PICO-NPA: High-Level Synthesis of Nonprogrammable Hardware Accelerators","volume":"31","author":"schreiber","year":"2002","journal-title":"Journal of VLSI Signal Processing"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/331963.331978"},{"article-title":"Compiler: Principles, Techniques, and Tools","year":"2007","author":"aho","key":"ref6"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1016\/j.optlastec.2007.12.007"},{"key":"ref8","first-page":"330","article-title":"Tutorial on high-level synthesis","author":"mcfarland","year":"0","journal-title":"Proc 25th ACM\/IEEE Design Automation Conf"},{"key":"ref7","article-title":"High-level Synthesis from the Synchronous Language Esterel","author":"edwards","year":"2002","journal-title":"Proc IWLS"},{"key":"ref2","first-page":"63","article-title":"Reverse engineering of real PCB level design using VERILOG HDL","author":"koutsougeras","year":"2002","journal-title":"Intelligent Systems Engineering J"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2007.4380647"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/FPGA.1998.707944"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/1723112.1723119"}],"event":{"name":"2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010)","start":{"date-parts":[[2010,3,8]]},"location":"Dresden","end":{"date-parts":[[2010,3,12]]}},"container-title":["2010 Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE 2010)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5450668\/5456897\/05457011.pdf?arnumber=5457011","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,21]],"date-time":"2017-06-21T03:48:17Z","timestamp":1498016897000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5457011\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,3]]},"references-count":20,"URL":"https:\/\/doi.org\/10.1109\/date.2010.5457011","relation":{},"subject":[],"published":{"date-parts":[[2010,3]]}}}