{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,24]],"date-time":"2025-10-24T16:37:43Z","timestamp":1761323863688,"version":"3.28.0"},"reference-count":22,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,3]]},"DOI":"10.1109\/date.2010.5457033","type":"proceedings-article","created":{"date-parts":[[2013,2,19]],"date-time":"2013-02-19T13:16:33Z","timestamp":1361279793000},"page":"1408-1413","source":"Crossref","is-referenced-by-count":7,"title":["Leveraging application-level requirements in the design of a NoC for a 4G SoC - a case study"],"prefix":"10.1109","author":[{"given":"Rudy","family":"Beraha","sequence":"first","affiliation":[]},{"given":"Isask'har","family":"Walter","sequence":"additional","affiliation":[]},{"given":"Israel","family":"Cidon","sequence":"additional","affiliation":[]},{"given":"Avinoam","family":"Kolodny","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","first-page":"27","article-title":"Mapping and Physical Planning of Networks-on-Chip Architectures with Quality-of-Service Guarantees","author":"murali","year":"2005","journal-title":"Proc Asia South Pacific Design Automation"},{"key":"ref11","first-page":"387","article-title":"A Technique for Low Energy Mapping and Routing in Network-on-Chip Architectures","author":"srinivasan","year":"0","journal-title":"Proc Low Power Electronics and Design 2005"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/1084834.1084857"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2005.11"},{"key":"ref14","first-page":"146","article-title":"Mapping and Configuration Methods for Multi-Use-Case Networks on Chips","author":"murali","year":"2006","journal-title":"Proc Asia South Pacific Design Automation"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1049\/iet-cdt.2008.0093"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2006.244007"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/NOCS.2007.31"},{"year":"0","key":"ref18","article-title":"MATRICS website"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1155\/2007\/90941"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/MCAS.2004.1330747"},{"key":"ref3","doi-asserted-by":"crossref","first-page":"105","DOI":"10.1016\/j.sysarc.2003.07.004","article-title":"QNoC: QoS Architecture and Design Process for Network on Chip","volume":"50","author":"bolotin","year":"2004","journal-title":"Journal of Systems Architecture"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/1119772.1119818"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1016\/j.vlsi.2004.03.006"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2005.149"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2004.1269002"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2005.99"},{"key":"ref1","first-page":"250","article-title":"A Generic Architecture for On-Chip Packet-Switched Interconnections","author":"guerrier","year":"0","journal-title":"Proc 2000 Design Automation and Test in Europe (DATE '00)"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/CODESS.2004.241215"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1166\/jolpe.2006.069"},{"year":"0","key":"ref22","article-title":"OPNET modeler"},{"key":"ref21","article-title":"A Communication-Aware Topological Mapping Technique for NoCs","author":"tornero","year":"2008","journal-title":"Proc the 14th int Euro-Par conference on Parallel Processing"}],"event":{"name":"2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010)","start":{"date-parts":[[2010,3,8]]},"location":"Dresden","end":{"date-parts":[[2010,3,12]]}},"container-title":["2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5450668\/5456897\/05457033.pdf?arnumber=5457033","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,21]],"date-time":"2017-06-21T03:48:25Z","timestamp":1498016905000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5457033\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,3]]},"references-count":22,"URL":"https:\/\/doi.org\/10.1109\/date.2010.5457033","relation":{},"subject":[],"published":{"date-parts":[[2010,3]]}}}