{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T14:30:46Z","timestamp":1725633046805},"reference-count":18,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,3]]},"DOI":"10.1109\/date.2010.5457100","type":"proceedings-article","created":{"date-parts":[[2013,2,19]],"date-time":"2013-02-19T18:16:33Z","timestamp":1361297793000},"page":"1767-1772","source":"Crossref","is-referenced-by-count":6,"title":["Block-level bayesian diagnosis of analogue electronic circuits"],"prefix":"10.1109","author":[{"given":"S","family":"Krishnan","sequence":"first","affiliation":[]},{"given":"K D","family":"Doornbos","sequence":"additional","affiliation":[]},{"given":"R","family":"Brand","sequence":"additional","affiliation":[]},{"given":"H G","family":"Kerkhoff","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/82.539002"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1997.639705"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.1999.761121"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TIM.2002.1017726"},{"key":"ref14","article-title":"Parametric fault diagnosis for analog circuits using a Bayesian framework","author":"liu","year":"0","journal-title":"IEEE VLSI Test Symposium 2006"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1142\/S0218126608004605"},{"article-title":"Probabilistic Reasoning in Intelligent Systems: Networks of Plausible Inference. Representation and Reasoning Series","year":"1988","author":"pearl","key":"ref16"},{"key":"ref17","doi-asserted-by":"crossref","DOI":"10.1007\/978-0-387-84858-7","article-title":"The Elements of Statistical Learning","author":"hastie","year":"2009"},{"year":"0","key":"ref18","article-title":"Netica, Norsys Software Corp"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2005.1583963"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1997.639692"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/VTEST.1995.512618"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1993.470682"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/54.124515"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.1997.606616"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1993.470641"},{"key":"ref1","first-page":"651","article-title":"VDD Ramp Testing for RF Circuits","author":"de gyvez","year":"2003","journal-title":"IEEE Int Test Conference"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/EDTC.1995.470319"}],"event":{"name":"2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010)","start":{"date-parts":[[2010,3,8]]},"location":"Dresden","end":{"date-parts":[[2010,3,12]]}},"container-title":["2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5450668\/5456897\/05457100.pdf?arnumber=5457100","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,21]],"date-time":"2017-06-21T07:48:21Z","timestamp":1498031301000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5457100\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,3]]},"references-count":18,"URL":"https:\/\/doi.org\/10.1109\/date.2010.5457100","relation":{},"subject":[],"published":{"date-parts":[[2010,3]]}}}