{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,5,18]],"date-time":"2025-05-18T18:40:55Z","timestamp":1747593655685},"reference-count":11,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,3]]},"DOI":"10.1109\/date.2010.5457219","type":"proceedings-article","created":{"date-parts":[[2013,2,19]],"date-time":"2013-02-19T13:16:33Z","timestamp":1361279793000},"page":"148-153","source":"Crossref","is-referenced-by-count":10,"title":["A nondestructive self-reference scheme for Spin-Transfer Torque Random Access Memory (STT-RAM)"],"prefix":"10.1109","author":[{"family":"Yiran Chen","sequence":"first","affiliation":[]},{"family":"Hai Li","sequence":"additional","affiliation":[]},{"family":"Xiaobin Wang","sequence":"additional","affiliation":[]},{"family":"Wenzhong Zhu","sequence":"additional","affiliation":[]},{"family":"Wei Xu","sequence":"additional","affiliation":[]},{"family":"Tong Zhang","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"doi-asserted-by":"publisher","key":"ref4","DOI":"10.1109\/VLSIT.2004.1345371"},{"key":"ref3","first-page":"22","article-title":"A Study for 0.18m High-density MRAM","author":"motoyoshi","year":"2004","journal-title":"Proc VLSI Symposium"},{"doi-asserted-by":"publisher","key":"ref10","DOI":"10.1109\/JSSC.2003.818145"},{"key":"ref6","first-page":"480","article-title":"2Mb Spin-Transfer Torque RAM (SPRAM) with Bit-by-Bit Bidirectional Current Write and Parallelizing-Direction Current Read","author":"kawahara","year":"2007","journal-title":"Tech Dig IEEE Int Solid-State Circ Conf"},{"doi-asserted-by":"publisher","key":"ref11","DOI":"10.1109\/ISQED.2008.4479820"},{"doi-asserted-by":"publisher","key":"ref5","DOI":"10.1109\/IEDM.2005.1609379"},{"doi-asserted-by":"publisher","key":"ref8","DOI":"10.1109\/20.908581"},{"doi-asserted-by":"publisher","key":"ref7","DOI":"10.1109\/ASSCC.2006.357911"},{"year":"2007","journal-title":"International Technology Roadmap for Semiconductor","key":"ref2"},{"key":"ref9","first-page":"731","article-title":"An Overview of Nonvolatile Memory Technology and The Implication for Tools and Architectures","author":"li","year":"2009","journal-title":"Proc Design Automation Test Europe Conf Exhibition"},{"doi-asserted-by":"publisher","key":"ref1","DOI":"10.1109\/IEDM.2007.4418854"}],"event":{"name":"2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010)","start":{"date-parts":[[2010,3,8]]},"location":"Dresden","end":{"date-parts":[[2010,3,12]]}},"container-title":["2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5450668\/5456897\/05457219.pdf?arnumber=5457219","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,18]],"date-time":"2017-03-18T22:39:25Z","timestamp":1489876765000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5457219\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,3]]},"references-count":11,"URL":"https:\/\/doi.org\/10.1109\/date.2010.5457219","relation":{},"subject":[],"published":{"date-parts":[[2010,3]]}}}