{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,22]],"date-time":"2024-10-22T15:46:24Z","timestamp":1729611984100,"version":"3.28.0"},"reference-count":14,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2011,3]]},"DOI":"10.1109\/date.2011.5763132","type":"proceedings-article","created":{"date-parts":[[2013,2,19]],"date-time":"2013-02-19T17:45:16Z","timestamp":1361295916000},"page":"1-6","source":"Crossref","is-referenced-by-count":1,"title":["Interconnect-fault-resilient delay-insensitive asynchronous communication link based on current-flow monitoring"],"prefix":"10.1109","author":[{"given":"N","family":"Onizawa","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"A","family":"Matsumoto","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"T","family":"Hanyu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"crossref","first-page":"345","DOI":"10.1109\/DFTVS.2002.1173531","article-title":"Duplication-Based Concurrent Error Detection in Asynchronous Circuits: Shortcomings and Remedies","author":"verdel","year":"2002","journal-title":"Proc IEEE Int Symp Defect and Fault Tolerance in VLSI Systems 2002"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/IDT.2007.4437437"},{"key":"ref12","first-page":"74","article-title":"Delay Insensitive System-on-Chip Interconnectusing l-of-4 Data Encoding","author":"bainbridge","year":"2001","journal-title":"Proc 7th IEEE Int Symp Asynchronous Circuits Syst"},{"key":"ref13","article-title":"Immunet: A cheap and robust fault-tolerant packet routing mechanism","volume":"32","author":"puente","year":"2004","journal-title":"ACMSIGARCH Computer Architecture News"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2009.5090627"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4757-3385-3_2"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.909339"},{"key":"ref6","first-page":"298","article-title":"Investigation of via-dominated multi-modal electromigration failure distributions in dual damascene Cu interconnects with a discussion of the statistical implications","author":"gill","year":"2002","journal-title":"Proc Int Ref Phys Symp"},{"journal-title":"International Technology Roadmap for Semi-Conductors","year":"2007","key":"ref5"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2009.5117927"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS.2010.5488708"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2007.164"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/2.976921"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1155\/2007\/94676"}],"event":{"name":"2011 Design, Automation & Test in Europe","start":{"date-parts":[[2011,3,14]]},"location":"Grenoble","end":{"date-parts":[[2011,3,18]]}},"container-title":["2011 Design, Automation & Test in Europe"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5754459\/5762992\/05763132.pdf?arnumber=5763132","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,21]],"date-time":"2017-06-21T03:50:08Z","timestamp":1498017008000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5763132\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,3]]},"references-count":14,"URL":"https:\/\/doi.org\/10.1109\/date.2011.5763132","relation":{},"subject":[],"published":{"date-parts":[[2011,3]]}}}