{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,26]],"date-time":"2025-10-26T21:14:10Z","timestamp":1761513250823},"reference-count":13,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2011,3]]},"DOI":"10.1109\/date.2011.5763267","type":"proceedings-article","created":{"date-parts":[[2013,2,19]],"date-time":"2013-02-19T22:45:16Z","timestamp":1361313916000},"page":"1-6","source":"Crossref","is-referenced-by-count":13,"title":["Generator based approach for analog circuit and layout design and optimization"],"prefix":"10.1109","author":[{"given":"Achim","family":"Graupner","sequence":"first","affiliation":[{"name":"Zentrum Mikroelektronik Dresden AG Dresden, Germany"}]},{"given":"Roland","family":"Jancke","sequence":"additional","affiliation":[{"name":"Design Automation Division, Fraunhofer Institute Integrated Circuits, Dresden, Germany"}]},{"given":"Reimund","family":"Wittmann","sequence":"additional","affiliation":[{"name":"IP GEN Rechte GmbH Bochum, Germany"}]}],"member":"263","reference":[{"key":"ref10","article-title":"Yield prediction and optimization to gain accurate devices for analog design in nonideal nanoscale processes","author":"kosakowski","year":"2008","journal-title":"10th International Workshop on Symbolic and Numerical Methods Modeling and Applications to Circuit Design (SM2ACD ' ‘08) Erfurt"},{"key":"ref11","article-title":"Design for Yield Concepts for Analogue and Mixed-Signal Circuits","author":"pronath","year":"2006","journal-title":"MEDEA+ Design Automation Conference"},{"year":"0","key":"ref12"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2008.923417"},{"key":"ref4","article-title":"Comprehensive Generation of Hierarchical Placement Rules for Analog Integrated Circuits","author":"eick","year":"2010","journal-title":"IEEE Transactions on Computer-Aided Design on Integrated Circuits and Systems"},{"year":"0","key":"ref3"},{"year":"0","key":"ref6"},{"journal-title":"Analog Layout Synthesis - A Survey of Topological Approaches","year":"2010","author":"gr\u00e4b","key":"ref5"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/1146909.1147134"},{"year":"0","key":"ref7"},{"year":"0","key":"ref2"},{"journal-title":"International Technology Roadmap for Semiconductors","year":"2009","key":"ref1"},{"key":"ref9","first-page":"936","article-title":"Life begins at 65 - Unless you are mixed-signal?","author":"wittmann","year":"2007","journal-title":"Proceedings DATE 07 Nice"}],"event":{"name":"2011 Design, Automation & Test in Europe Conference & Exhibition (DATE 2011)","start":{"date-parts":[[2011,3,14]]},"location":"Grenoble, France","end":{"date-parts":[[2011,3,18]]}},"container-title":["2011 Design, Automation & Test in Europe"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5754459\/5762992\/05763267.pdf?arnumber=5763267","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,6,8]],"date-time":"2021-06-08T14:21:49Z","timestamp":1623162109000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/5763267\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,3]]},"references-count":13,"URL":"https:\/\/doi.org\/10.1109\/date.2011.5763267","relation":{},"subject":[],"published":{"date-parts":[[2011,3]]}}}