{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,29]],"date-time":"2024-10-29T14:57:22Z","timestamp":1730213842141,"version":"3.28.0"},"reference-count":16,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018,11]]},"DOI":"10.1109\/dcis.2018.8681467","type":"proceedings-article","created":{"date-parts":[[2019,4,27]],"date-time":"2019-04-27T07:14:45Z","timestamp":1556349285000},"page":"1-6","source":"Crossref","is-referenced-by-count":1,"title":["Floorplanning as a practical countermeasure against clock fault attack in Trivium stream cipher"],"prefix":"10.1109","author":[{"given":"F. E.","family":"Potestad-Ordonez","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"C. J.","family":"Jimenez-Fernandez","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"C.","family":"Baena-Oliva","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"P.","family":"Parra-Fernandez","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"M.","family":"Valencia-Barrero","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2012.2188769"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-12510-2_13"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-662-48324-4_22"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1007\/11889700_15"},{"key":"ref14","first-page":"562","article-title":"Fault Attack on FPGA implementations of Trivium Stream Cipher","author":"potestad-ord\u00f3\u00f1ez","year":"2016","journal-title":"International Symposium on Circuits and Systems(ISCAS)"},{"key":"ref15","article-title":"Experimental and Timing Analysis Comparison of FPGA Trivium Implementations and their Vulnerability to Clock Fault Injection","author":"potestad-ord\u00f3\u00f1ez","year":"2016","journal-title":"Design of Circuits and Integrated Systems (DCIS&#x2019; 99)"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2017.2751151"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-69053-0_4"},{"key":"ref3","doi-asserted-by":"crossref","first-page":"171","DOI":"10.1007\/11836810_13","article-title":"Trivium: A stream cipher construction inspired by block cipher design principles","author":"canni\u00e8re","year":"2006","journal-title":"Information Security"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-71039-4_10"},{"key":"ref5","first-page":"125","article-title":"Low Cost Attacks on Tamper Resistant Devices","author":"street","year":"1998","journal-title":"Security Protocols"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1007\/s10623-011-9518-9"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-89754-5_19"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2014.7001385"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ICITST.2015.7412116"},{"key":"ref9","doi-asserted-by":"crossref","first-page":"370","DOI":"10.1109\/JPROC.2005.862424","article-title":"The Sorcerer&#x2019;s Apprentice Guide to Fault Attacks","volume":"94","author":"bar-el","year":"2006","journal-title":"Proceedings of the IEEE"}],"event":{"name":"2018 Conference on Design of Circuits and Integrated Systems (DCIS)","start":{"date-parts":[[2018,11,14]]},"location":"Lyon, France","end":{"date-parts":[[2018,11,16]]}},"container-title":["2018 Conference on Design of Circuits and Integrated Systems (DCIS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8679952\/8681454\/08681467.pdf?arnumber=8681467","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,12,23]],"date-time":"2021-12-23T17:47:51Z","timestamp":1640281671000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8681467\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,11]]},"references-count":16,"URL":"https:\/\/doi.org\/10.1109\/dcis.2018.8681467","relation":{},"subject":[],"published":{"date-parts":[[2018,11]]}}}