{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,6]],"date-time":"2026-01-06T13:54:43Z","timestamp":1767707683479},"reference-count":23,"publisher":"IEEE","license":[{"start":{"date-parts":[[2019,11,1]],"date-time":"2019-11-01T00:00:00Z","timestamp":1572566400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,11,1]],"date-time":"2019-11-01T00:00:00Z","timestamp":1572566400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,11,1]],"date-time":"2019-11-01T00:00:00Z","timestamp":1572566400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2019,11]]},"DOI":"10.1109\/dcis201949030.2019.8959882","type":"proceedings-article","created":{"date-parts":[[2020,1,16]],"date-time":"2020-01-16T21:11:20Z","timestamp":1579209080000},"page":"1-6","source":"Crossref","is-referenced-by-count":2,"title":["Deep Packet Inspection Through Virtual Platforms using System-On-Chip FPGAs"],"prefix":"10.1109","author":[{"given":"Raquel","family":"Leon","sequence":"first","affiliation":[]},{"given":"Adrian","family":"Dominguez","sequence":"additional","affiliation":[]},{"given":"Pedro P.","family":"Carballo","sequence":"additional","affiliation":[]},{"given":"Antonio","family":"Nunez","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"journal-title":"VIS User's Manual","year":"2017","key":"ref10"},{"key":"ref11","article-title":"DPI technology from the standpoint of Internet governance studies","author":"mueller","year":"2011","journal-title":"Nueva York"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/359842.359859"},{"key":"ref13","article-title":"A fast algorithm for multi-pattern searching","author":"wu","year":"1994","journal-title":"Department of Computer Science University of Arizona Tucson AZ"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ANTS.2016.7947802"},{"key":"ref15","first-page":"631","article-title":"Hyperscan: A Fast Multi-pattern Regex Matcher for Modern CPUs","author":"wang","year":"2019","journal-title":"USENIX Symposium on Networked Systems Design and Implementation"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.3390\/a10010016"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.14569\/IJACSA.2017.081128"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1007\/s11265-016-1139-0"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1016\/j.jpdc.2015.11.001"},{"journal-title":"OSCI TLM-2 0 Language Reference Manual","year":"2009","key":"ref4"},{"year":"2012","key":"ref3","first-page":"1"},{"journal-title":"Better Software Faster! Best Practices in Virtual Prototyping","year":"2014","author":"de schutter","key":"ref6"},{"key":"ref5","first-page":"41","article-title":"QEMU, a Fast and Portable Dynamic Translator","author":"bellard","year":"2005","journal-title":"FREENIX Track 2005 USENIX Annual Technical Conference"},{"journal-title":"Creating Virtual Platforms with Wind River Simics","year":"2011","author":"engblom","key":"ref8"},{"journal-title":"Imperas","article-title":"Open Virtual Platforms &#x2122; Benefits of Virtual Platforms for Embedded Software Development","year":"2011","key":"ref7"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-59418-7_11"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1016\/B978-0-12-374364-0.50012-6"},{"journal-title":"Synopsys","article-title":"Virtualizer - VDK","year":"2016","key":"ref9"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/ReCoSoC.2017.8016159"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/ReConFig.2016.7857172"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/MEMCOD.2010.5558646"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/43.898830"}],"event":{"name":"2019 XXXIV Conference on Design of Circuits and Integrated Systems (DCIS)","start":{"date-parts":[[2019,11,20]]},"location":"Bilbao, Spain","end":{"date-parts":[[2019,11,22]]}},"container-title":["2019 XXXIV Conference on Design of Circuits and Integrated Systems (DCIS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8952591\/8959817\/08959882.pdf?arnumber=8959882","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,14]],"date-time":"2022-07-14T23:13:13Z","timestamp":1657840393000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8959882\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,11]]},"references-count":23,"URL":"https:\/\/doi.org\/10.1109\/dcis201949030.2019.8959882","relation":{},"subject":[],"published":{"date-parts":[[2019,11]]}}}