{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,29]],"date-time":"2024-10-29T14:58:00Z","timestamp":1730213880537,"version":"3.28.0"},"reference-count":35,"publisher":"IEEE","license":[{"start":{"date-parts":[[2020,11,18]],"date-time":"2020-11-18T00:00:00Z","timestamp":1605657600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2020,11,18]],"date-time":"2020-11-18T00:00:00Z","timestamp":1605657600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2020,11,18]],"date-time":"2020-11-18T00:00:00Z","timestamp":1605657600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2020,11,18]]},"DOI":"10.1109\/dcis51330.2020.9268660","type":"proceedings-article","created":{"date-parts":[[2020,11,30]],"date-time":"2020-11-30T21:59:32Z","timestamp":1606773572000},"page":"1-6","source":"Crossref","is-referenced-by-count":0,"title":["Microarchitectural Isolation Guarantees Through Execution Based Signatures"],"prefix":"10.1109","author":[{"given":"Samira","family":"Briongos","sequence":"first","affiliation":[]},{"given":"Pedro","family":"Malagon","sequence":"additional","affiliation":[]},{"given":"Jose M.","family":"Moya","sequence":"additional","affiliation":[]},{"given":"Thomas","family":"Eisenbarth","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref33","article-title":"Reload+refresh: Abusing cache replacement policies to perform stealthy cache attacks","author":"briongos","year":"2020","journal-title":"29th USENIX Security Symposium (USENIX Security 20)"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1093\/biomet\/41.1-2.100"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1145\/3342195.3387532"},{"key":"ref30","first-page":"636","article-title":"Sok: Understanding the prevailing security vulnerabilities in trustzone-assisted tee systems","author":"cerdeira","year":"2020","journal-title":"2020 IEEE Symposium on Security and Privacy (SP)"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/ICISC.2017.8068638"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1016\/j.micpro.2006.02.008"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/SP.2011.22"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/2810103.2813708"},{"key":"ref12","first-page":"719","article-title":"FLUSH+RELOAD: A High Resolution, Low Noise, L3 Cache Side-Channel Attack","author":"yarom","year":"2014","journal-title":"23rd USENIX Security Symposium (USENIX Security 14)"},{"key":"ref13","first-page":"299","article-title":"Wait a minute! A fast, cross-vm attack on AES","author":"apecechea","year":"2014","journal-title":"Research in Attacks Intrusions and Defenses - 17th International Symposium RAID 2014 Gothenburg Sweden September 17-19 2014 Proceedings"},{"key":"ref14","first-page":"1","article-title":"Cache Attacks and Countermeasures: The Case of AES","author":"osvik","year":"0"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/SP.2015.43"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/1653662.1653687"},{"key":"ref17","article-title":"Cache Attacks Enable Bulk Key Recovery on the Cloud","author":"inci","year":"2016","journal-title":"Cryptographic Hardware and Embedded Systems – CHES 2016 18th International Conference Santa Barbara CA USA August 17-19 2016 Proceedings"},{"key":"ref18","first-page":"980","article-title":"Truspy: Cache side-channel information leakage from the secure world on arm devices","volume":"2016","author":"zhang","year":"2016","journal-title":"IACR Cryptology ePrint"},{"key":"ref19","article-title":"Software grand exposure: SGX cache attacks are practical","author":"brasser","year":"2017","journal-title":"11th USENIX Workshop on Offensive Technologies (WOOT 17)"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1145\/1250662.1250723"},{"key":"ref4","first-page":"973","article-title":"Meltdown: Reading kernel memory from user space","author":"lipp","year":"2018","journal-title":"27th USENIX Security Symposium (USENIX Security 18)"},{"key":"ref27","article-title":"Foreshadow: Extracting the keys to the Intel SGX kingdom with transient out-of-order execution","author":"van bulck","year":"2018","journal-title":"Proceedings of the 27th USENIX Security Symposium"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/3319535.3354252"},{"article-title":"Exploiting the dram rowhammer bug to gain kernel privileges","year":"2015","author":"seaborn","key":"ref6"},{"article-title":"Fortuneteller: Predicting microarchitectural attacks via unsupervised deep learning","year":"2019","author":"gulmezoglu","key":"ref29"},{"key":"ref5","first-page":"185","article-title":"New branch prediction vulnerabilities in openssl and necessary software countermeasures","author":"acii\u00e7mez","year":"2007","journal-title":"Proceedings of the 11th IMA International Conference on Cryptography and Coding ser Cryptography and Coding’07"},{"key":"ref8","first-page":"565","article-title":"DRAMA: Exploiting DRAM addressing for cross-cpu attacks","author":"pessl","year":"2016","journal-title":"25th USENIX Security Symposium (USENIX Security 16)"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2014.6853210"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/3319535.3363219"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/SP.2019.00066"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/SP.2019.00002"},{"key":"ref20","doi-asserted-by":"crossref","first-page":"69","DOI":"10.1007\/978-3-319-66787-4_4","article-title":"Cachezoom: How sgx amplifies the power of cache attacks","author":"moghimi","year":"2017","journal-title":"Cryptographic Hardware and Embedded Systems – CHES 2017"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1145\/3352460.3358310"},{"key":"ref21","first-page":"857","article-title":"Sanctum: Minimal hardware extensions for strong software isolation","author":"costan","year":"2016","journal-title":"25th USENIX Security Symposium (USENIX Security 16)"},{"key":"ref24","first-page":"118","author":"zhang","year":"2016","journal-title":"CloudRadar A Real-Time Side-Channel Attack Detection System in Clouds"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1145\/3176258.3176320"},{"key":"ref26","first-page":"140","article-title":"Recovering openssl ecdsa nonces using the flush+reload cache side-channel attack","volume":"2014","author":"yarom","year":"2014","journal-title":"IACR Cryptology ePrint Archive"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.3390\/app9050944"}],"event":{"name":"2020 XXXV Conference on Design of Circuits and Integrated Systems (DCIS)","start":{"date-parts":[[2020,11,18]]},"location":"Segovia, Spain","end":{"date-parts":[[2020,11,20]]}},"container-title":["2020 XXXV Conference on Design of Circuits and Integrated Systems (DCIS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9268497\/9268612\/09268660.pdf?arnumber=9268660","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,6,27]],"date-time":"2022-06-27T15:47:16Z","timestamp":1656344836000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9268660\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,11,18]]},"references-count":35,"URL":"https:\/\/doi.org\/10.1109\/dcis51330.2020.9268660","relation":{},"subject":[],"published":{"date-parts":[[2020,11,18]]}}}