{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,1,11]],"date-time":"2025-01-11T05:34:24Z","timestamp":1736573664764,"version":"3.32.0"},"reference-count":20,"publisher":"IEEE","license":[{"start":{"date-parts":[[2024,11,13]],"date-time":"2024-11-13T00:00:00Z","timestamp":1731456000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2024,11,13]],"date-time":"2024-11-13T00:00:00Z","timestamp":1731456000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2024,11,13]]},"DOI":"10.1109\/dcis62603.2024.10769198","type":"proceedings-article","created":{"date-parts":[[2024,12,3]],"date-time":"2024-12-03T18:54:06Z","timestamp":1733252046000},"page":"1-6","source":"Crossref","is-referenced-by-count":0,"title":["Cloud-Edge Continuum Infrastructure for Reconfigurable Multi-Accelerator Systems"],"prefix":"10.1109","author":[{"given":"I\u00f1igo D\u00edez","family":"De Ulzurrun","sequence":"first","affiliation":[{"name":"Universidad Politécnica de Madrid,Centro de Electrónica Industrial,Madrid,Spain"}]},{"given":"Juan","family":"Encinas","sequence":"additional","affiliation":[{"name":"Universidad Politécnica de Madrid,Centro de Electrónica Industrial,Madrid,Spain"}]},{"given":"Alfonso","family":"Rodr\u00edguez","sequence":"additional","affiliation":[{"name":"Universidad Politécnica de Madrid,Centro de Electrónica Industrial,Madrid,Spain"}]},{"given":"Andr\u00e9s","family":"Otero","sequence":"additional","affiliation":[{"name":"Universidad Politécnica de Madrid,Centro de Electrónica Industrial,Madrid,Spain"}]}],"member":"263","reference":[{"issue":"1","key":"ref1","first-page":"1","article-title":"The next generation cloud technologies: a review on distributed cloud, fog and edge computing and their opportunities and challenges","volume":"1","author":"Atieh","year":"2021","journal-title":"RRST"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-031-36889-9_16"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TMC.2020.3041781"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/MCSE.2021.3127288"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/3506713"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2022.3152803"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.3390\/s18061877"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.3390\/fi15120383"},{"key":"ref9","article-title":"Using fpgas as microservices: Technology, challenges and case study","author":"Ojika","year":"2018","journal-title":"BPOE-9"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ICMCCE51767.2020.00109"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.23919\/DATE48585.2020.9116333"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/BMSB.2018.8436912"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/2815631"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS45731.2020.9181123"},{"journal-title":"Xilinx, PG195","article-title":"DMA\/bridge subsystem for PCI Express","year":"2023","key":"ref15"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/IISWC.2014.6983050"},{"article-title":"The landscape of parallel computing research: A view from berkeley","year":"2006","author":"Asanovic","key":"ref17"},{"first-page":"PG348","article-title":"Alveo Card Mgmt. Sol. Subsystem Guide","year":"2023","key":"ref18"},{"key":"ref19","first-page":"UG1137","article-title":"Zynq ultrascale+ test software developer guide","year":"2019","journal-title":"Xilinx"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1016\/j.micpro.2024.105050"}],"event":{"name":"2024 39th Conference on Design of Circuits and Integrated Systems (DCIS)","start":{"date-parts":[[2024,11,13]]},"location":"Catania, Italy","end":{"date-parts":[[2024,11,15]]}},"container-title":["2024 39th Conference on Design of Circuits and Integrated Systems (DCIS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/10769040\/10769041\/10769198.pdf?arnumber=10769198","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,1,10]],"date-time":"2025-01-10T19:56:03Z","timestamp":1736538963000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10769198\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,11,13]]},"references-count":20,"URL":"https:\/\/doi.org\/10.1109\/dcis62603.2024.10769198","relation":{},"subject":[],"published":{"date-parts":[[2024,11,13]]}}}