{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,27]],"date-time":"2026-01-27T17:27:55Z","timestamp":1769534875704,"version":"3.49.0"},"reference-count":6,"publisher":"IEEE","license":[{"start":{"date-parts":[[2025,11,26]],"date-time":"2025-11-26T00:00:00Z","timestamp":1764115200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,11,26]],"date-time":"2025-11-26T00:00:00Z","timestamp":1764115200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2025,11,26]]},"DOI":"10.1109\/dcis67520.2025.11281921","type":"proceedings-article","created":{"date-parts":[[2025,12,11]],"date-time":"2025-12-11T18:44:08Z","timestamp":1765478648000},"page":"194-198","source":"Crossref","is-referenced-by-count":0,"title":["A 300 mA Fully-Integrated Inverter-Based LDO with Enhanced Supply Insensitivity for Smart Edge AI Applications"],"prefix":"10.1109","author":[{"given":"M. Clara","family":"Sim\u00f5es","sequence":"first","affiliation":[{"name":"Instituto Superior Técnico, University of Lisbon,Lisbon,Portugal"}]},{"given":"Floriberto","family":"Lima","sequence":"additional","affiliation":[{"name":"SiliconGate,Lisbon,Portugal"}]},{"given":"Marcelino","family":"Santos","sequence":"additional","affiliation":[{"name":"Instituto Superior Técnico, University of Lisbon,Lisbon,Portugal"}]},{"given":"F\u00e1bio","family":"Passos","sequence":"additional","affiliation":[{"name":"Instituto Superior Técnico, University of Lisbon,Lisbon,Portugal"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2022.3217919"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TPEL.2020.3024595"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2017.7870283"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TPEL.2019.2910557"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS58744.2024.10558610"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2024.3357206"}],"event":{"name":"2025 40th Conference on Design of Circuits and Integrated Systems (DCIS)","location":"Santander, Spain","start":{"date-parts":[[2025,11,26]]},"end":{"date-parts":[[2025,11,28]]}},"container-title":["2025 40th Conference on Design of Circuits and Integrated Systems (DCIS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/11281883\/11281806\/11281921.pdf?arnumber=11281921","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,1,27]],"date-time":"2026-01-27T04:47:38Z","timestamp":1769489258000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11281921\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,11,26]]},"references-count":6,"URL":"https:\/\/doi.org\/10.1109\/dcis67520.2025.11281921","relation":{},"subject":[],"published":{"date-parts":[[2025,11,26]]}}}